Epson 6200A Core Cpu Manual page 66

3 INSTRUCTION SET
LD YL,r
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
LD YP,r
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
60
Load r-register into YL
LD YL,r
YL r
1 1 1 0 1 0 0 1 1 0 r
MSB
V
5
C – Not affected
Z – Not affected
D – Not affected
I – Not affected
Loads the contents of the r-register into the four low-order bits of register Y.
LD YL,B
YL register 1011
B register 1010
Memory (MX) 0111
Load r-register into YP
LD YP,r
YP r
1 1 1 0 1 0 0 1 0 0 r
MSB
V
5
C – Not affected
Z – Not affected
D – Not affected
I – Not affected
Loads the contents of the r-register into the 4-bit page part of index register IY.
LD YP,MX
YP register 0011
A register 0100
Memory (MX) 0000
r E98H to E9BH
1 0
LSB
LD YL,MX
1010 0111
1010 1010
0111 0111
r E90H to E93H
1 0
LSB
LD YP,A
0000 0100
0100 0100
0000 0000
EPSON
S1C6200/6200A CORE CPU MANUAL