Epson 6200A Core Cpu Manual page 64

3 INSTRUCTION SET
LD XL,r
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
LD XP,r
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
58
Load r-register into XL
LD XL,r
XL r
1 1 1 0 1 0 0 0 1 0 r
MSB
V
5
C – Not affected
Z – Not affected
D – Not affected
I – Not affected
Loads the contents of the r-register into the four low-order bits of register X.
LD XL,MY
XL register 0000
A register 1011
Memory (MY) 0010
Load r-register into XP
LD XP,r
XP r
1 1 1 0 1 0 0 0 0 0 r
MSB
V
5
C – Not affected
Z – Not affected
D – Not affected
I – Not affected
Loads the contents of the r-register into the 4-bit page part of index register IX.
LD XP,B
XP register 1001
B register 0001
Memory (MX) 1011
r E88H to E8BH
1 0
LSB
LD XL,A
0010 1011
1011 1011
0010 0010
r E80H to E83H
1 0
LSB
LD XP,MX
0001 1011
0001 0001
1011 1011
EPSON
S1C6200/6200A CORE CPU MANUAL