Epson 6200A Core Cpu Manual page 74

Core cpu cmos 4-bit single chip microcomputer
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3 INSTRUCTION SET
PUSH F
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
PUSH r
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
68
Push flag onto stack
PUSH F
SP'
SP - 1, M(SP')
1 1 1 1 1 1 0 0
MSB
VI
5
C –
Not affected
Z –
Not affected
D –
Not affected
I –
Not affected
Decrements the stack pointer by 1 and loads the flags (F) into the data memory
location addressed by SP.
SP
D0
Memory (CFH)
0100
Flags (I,D,Z,C)
0001
Push r-register onto stack
PUSH r
SP'
SP - 1, M(SP')
1 1 1 1 1 1 0 0
MSB
V
5
C –
Not affected
Z –
Not affected
D –
Not affected
I –
Not affected
Decrements the stack pointer by 1 and loads the contents of the r-register into the
data memory location addressed by SP.
SP
D0
Memory (CFH)
1000
A register
0010
F
1 0 1 0
FCAH
LSB
M(SP) =
PUSH F
CF
0001
0001
r
0 0 r
r
FC0H to FC3H
1
0
LSB
PUSH A
M(SP) =
CF
0010
0010
EPSON
3
2
1
0
2
2
2
2
C
flag
Z
flag
D
flag
I
flag
2
3
2
2
2
1
2
0
0
2
2
1
= r-register
2
2
3
2
S1C6200/6200A CORE CPU MANUAL

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