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OR r,q
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
POP F
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
S1C6200/6200A CORE CPU MANUAL
Logical OR q-register with r-register
OR r,q
r
r
q
1 0 1 0 1 1 0 1
MSB
IV
7
C –
Not affected
Z –
Set if the result is zero; otherwise, reset.
D –
Not affected
I –
Not affected
Performs a logical OR operation between the contents of the q-register and the
contents of the r-register. The result is stored in the r-register.
OR MY,0
A register
0011
Memory (MY)
0000
Z flag
0
Pop stack data into flags
POP F
F
M(SP), SP
SP + 1
1 1 1 1 1 1 0 1
MSB
VI
5
C –
Set or Reset by M(SP) data
Z –
Set or Reset by M(SP) data
D –
Set or Reset by M(SP) data
I –
Set or Reset by M(SP) data
Replaces the flags (F) with the contents of the data memory location addressed by
the stack pointer. SP is incremented by 1.
SP
C0
Memory (C0H)
1001
Flags (I,D,Z,C)
0001
r
r
q
q
AD0H to ADFH
1
0
1
0
LSB
OR A,0CH
0011
1111
0000
0000
1
1 0 1 0
FDAH
LSB
M(SP) =
POP F
C1
1001
1001
EPSON
3 INSTRUCTION SET
0
2
3
2
2
2
1
2
0
C
Z
D
I
flag
flag
flag
flag
63
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