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3 INSTRUCTION SET
ADD r,i
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
ADD r,q
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
32
Add immediate data i to r-register
ADD r,i
r
r + i
to i
3
0
1 1 0 0 0 0 r
MSB
II
7
C –
Set if a carry is generated; otherwise, reset.
Z –
Set if the result is zero; otherwise, reset.
D –
Not affected
I –
Not affected
Adds immediate data i to the contents of the r-register.
ADD A,5
A register
1010
Memory (MY)
0110
C flag
1
Z flag
0
Add q-register to r-register
ADD r,q
r
r + q
1 0 1 0 1 0 0 0 r
MSB
IV
7
C –
Set if a carry is generated; otherwise, reset.
Z –
Set if the result is zero; otherwise, reset.
D –
Not affected
I –
Not affected
Adds the contents of the q-register to the contents of the r-register.
ADD A,MY
A register
0010
B register
0100
Memory (MX)
0111
Memory (MY)
1101
C flag
1
Z flag
1
r
i
i
i
i
1
0
3
2
1
0
LSB
ADD MY,2
1111
0110
0
0
r
q
q
1
0
1
0
LSB
ADD MX,B
1111
0100
0111
1101
0
0
EPSON
C00H to C3FH
1111
1000
0
0
A80H to A8FH
1111
0100
1011
1101
0
0
S1C6200/6200A CORE CPU MANUAL
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