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2.14.2
MC_DIMM_CLK_RATIO
This register is for the Requested DIMM clock ratio (Qclk). This is the data rate going to
the DIMM. The clock sent to the DIMM is 1/2 of QCLK rate.
Device:
Function: 4
Offset:
Access as a Dword
Bit
4:0
98
3
54h
Reset
Type
Value
RW
6
QCLK_RATIO. Requested ratio of Qclk/Bclk.
00000 = RSVD
00110 = 800 MHz
01000 = 1066 MHz
01010 = 1333 MHz
Description
§
Register Description
Datasheet
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