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Register Description
2.8.2
MC_STATUS
This register is the MC primary status register.
Device:
Function: 0
Offset:
Access as a Dword
Bit
4
2
1
0
Datasheet
3
4Ch
Reset
Type
Value
RO
1
ECC_ENABLED. ECC is enabled.
CHANNEL2_DISABLED
Channel 2 is disabled. This can be factory configured or if Init done is written
RO
0
without the channel_active being set. Clocks in the channel will be disabled
when this bit is set.
CHANNEL1_DISABLED
Channel 1 is disabled. This can be factory configured or if Init done is written
RO
0
without the channel_active being set. Clocks in the channel will be disabled
when this bit is set.
CHANNEL0_DISABLED
Channel 0 is disabled. This can be factory configured or if Init done is written
RO
0
without the channel_active being set. Clocks in the channel will be disabled
when this bit is set.
Description
49
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