Mc_Channel_0_Odt_Matrix_Rank_4_7_Rd Mc_Channel_1_Odt_Matrix_Rank_4_7_Rd Mc_Channel_2_Odt_Matrix_Rank_4_7_Rd; Mc_Channel_0_Odt_Matrix_Rank_0_3_Wr Mc_Channel_1_Odt_Matrix_Rank_0_3_Wr Mc_Channel_2_Odt_Matrix_Rank_0_3_Wr; Mc_Channel_0_Odt_Matrix_Rank_4_7_Wr Mc_Channel_1_Odt_Matrix_Rank_4_7_Wr Mc_Channel_2_Odt_Matrix_Rank_4_7_Wr - Intel I7-900 DESKTOP PROCESSOR - DATASHEET VOLUME 2 Datasheet

2.10.20 MC_CHANNEL_0_ODT_MATRIX_RANK_4_7_RD
MC_CHANNEL_1_ODT_MATRIX_RANK_4_7_RD
MC_CHANNEL_2_ODT_MATRIX_RANK_4_7_RD
This register contains the ODT activation matrix for RANKS 4 to 7 for Reads.
Device:
Function:)0
Offset:
Access as a Dword
Bit
31:24
23:16
15:8
7:0
2.10.21 MC_CHANNEL_0_ODT_MATRIX_RANK_0_3_WR
MC_CHANNEL_1_ODT_MATRIX_RANK_0_3_WR
MC_CHANNEL_2_ODT_MATRIX_RANK_0_3_WR
This register contains the ODT activation matrix for RANKS 0 to 3 for Writes.
Device:
Function: 0
Offset:
Access as a Dword
Bit
31:24
23:16
15:8
7:0
2.10.22 MC_CHANNEL_0_ODT_MATRIX_RANK_4_7_WR
MC_CHANNEL_1_ODT_MATRIX_RANK_4_7_WR
MC_CHANNEL_2_ODT_MATRIX_RANK_4_7_WR
This register contains the ODT activation matrix for RANKS 4 to 7 for Writes.
Device:
Function: 0
Offset:
Access as a Dword
Bit
31:24
23:16
15:8
7:0
74
4, 5, 6
A8h
Reset
Type
Value
RW 1 ODT_RD7. Bit patterns driven out onto ODT pins when Rank7 is read.
RW 1 ODT_RD6. Bit patterns driven out onto ODT pins when Rank6 is read.
RW 4 ODT_RD5. Bit patterns driven out onto ODT pins when Rank5 is read.
RW 4 ODT_RD4. Bit patterns driven out onto ODT pins when Rank4 is read.
4, 5, 6
ACh
Reset
Type
Value
RW 9 ODT_WR3. Bit patterns driven out onto ODT pins when Rank3 is written.
RW 5 ODT_WR2. Bit patterns driven out onto ODT pins when Rank2 is written.
RW 6 ODT_WR1. Bit patterns driven out onto ODT pins when Rank1 is written.
RW 5 ODT_WR0. Bit patterns driven out onto ODT pins when Rank0 is written.
4, 5, 6
B0h
Reset
Type
Value
RW 9 ODT_WR7. Bit patterns driven out onto ODT pins when Rank7 is written.
RW 5 ODT_WR6. Bit patterns driven out onto ODT pins when Rank6 is written.
RW 6 ODT_WR5. Bit patterns driven out onto ODT pins when Rank5 is written.
RW 5 ODT_WR4. Bit patterns driven out onto ODT pins when Rank4 is written
Register Description
Description
Description
Description
Datasheet