Alphabetical Land Assignments - Intel Q9300 - Core 2 Quad 2.5 GHz 6M L2 Cache 1333MHz FSB LGA775 Quad-Core Processor Datasheet

Land Listing and Signal Descriptions
Table 4-1.
Land Name Land #
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DBI0#
DBI1#
DBI2#
DBI3#
DBR#
DBSY#
DEFER#
DPRSTP#
DPSLP#
DRDY#
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
Datasheet
Alphabetical Land
Assignments
Signal Buffer
Direction
Type
G16 Source Synch Input/Output
E15 Source Synch Input/Output
E16 Source Synch Input/Output
G18 Source Synch Input/Output
G17 Source Synch Input/Output
F17 Source Synch Input/Output
F18 Source Synch Input/Output
E18 Source Synch Input/Output
E19 Source Synch Input/Output
F20 Source Synch Input/Output
E21 Source Synch Input/Output
F21 Source Synch Input/Output
G21 Source Synch Input/Output
E22 Source Synch Input/Output
D22 Source Synch Input/Output
G22 Source Synch Input/Output
D20 Source Synch Input/Output
D17 Source Synch Input/Output
A14 Source Synch Input/Output
C15 Source Synch Input/Output
C14 Source Synch Input/Output
B15 Source Synch Input/Output
C18 Source Synch Input/Output
B16 Source Synch Input/Output
A17 Source Synch Input/Output
B18 Source Synch Input/Output
C21 Source Synch Input/Output
B21 Source Synch Input/Output
B19 Source Synch Input/Output
A19 Source Synch Input/Output
A22 Source Synch Input/Output
B22 Source Synch Input/Output
A8 Source Synch Input/Output
G11 Source Synch Input/Output
D19 Source Synch Input/Output
C20 Source Synch Input/Output
AC2 Power/Other Output
B2 Common Clock Input/Output
G7 Common Clock Input
T2 Asynch CMOS Input
P1 Asynch CMOS Input
C1 Common Clock Input/Output
C8 Source Synch Input/Output
G12 Source Synch Input/Output
G20 Source Synch Input/Output
A16 Source Synch Input/Output
Table 4-1. Alphabetical Land
Assignments
Signal Buffer
Land Name Land #
Type
DSTBP0# B9 Source Synch Input/Output
DSTBP1# E12 Source Synch Input/Output
DSTBP2# G19 Source Synch Input/Output
DSTBP3# C17 Source Synch Input/Output
FC0/
Y1 Power/Other
BOOTSELECT
FC3 J2 Power/Other
FC8 AK6 Power/Other
FC10 E24 Power/Other
FC15 H29 Power/Other
FC18 AE3 Power/Other
FC20 E5 Power/Other
FC21 F6 Power/Other
FC22 J3 Power/Other
FC23 A24 Power/Other
FC24 AK1 Power/Other
FC25 AL1 Power/Other
FC26 E29 Power/Other
FC29 U2 Power/Other
FC30 U3 Power/Other
FC31 J16 Power/Other
FC32 H15 Power/Other
FC33 H16 Power/Other
FC34 J17 Power/Other
FC35 H4 Power/Other
FC36 AD3 Power/Other
FC37 AB3 Power/Other
FC39 AA2 Power/Other
FC40 AM6 Power/Other
FERR#/PBE# R3 Asynch CMOS
GTLREF0 H1 Power/Other
GTLREF1 H2 Power/Other
GTLREF2 F2 Power/Other
GTLREF3 G10 Power/Other
HIT# D4 Common Clock Input/Output
HITM# E4 Common Clock Input/Output
IERR# AB2 Asynch CMOS
IGNNE# N2 Asynch CMOS
INIT# P3 Asynch CMOS
ITP_CLK0 AK3
ITP_CLK1 AJ3
LINT0 K1 Asynch CMOS
LINT1 L1 Asynch CMOS
LOCK# C3 Common Clock Input/Output
MSID0 W1 Power/Other
MSID1 V1 Power/Other
Direction
Output
Input
Input
Input
Input
Output
Input
Input
TAP Input
TAP Input
Input
Input
Output
Output
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