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R
Table 2-31: PM1 Pinout (Continued)
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
D1
D2
D3
66
PM1 Pin
FPGA Pin
H16
J16
A25
A24
A12
A11
AK6
AK7
AK19
AK20
D28
C27
H11
E10
F8
E9
G11
G9
C18
D18
D11
E12
A18
A17
A5
A4
AK13
AK14
AK26
AK27
D30
D29
G26
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Chapter 2: ML310 Embedded Development Platform
Pin Description
ML310 Schematic Net
IO_L69P_0
PM_IO_82
IO_L69N_0
PM_IO_83
RXPPAD4
RXPPAD4_A25
RXNPAD4
RXNPAD4_A24
RXPPAD7
RXPPAD7_A12
RXNPAD7
RXNPAD7_A11
TXPPAD16
TXPPAD16_AK6
TXNPAD16
TXNPAD16_AK7
TXPPAD19
TXPPAD19_AK19
TXNPAD19
TXNPAD19_AK20
IO_L06P_7
PM_IO_90
IO_L06N_7
PM_IO_91
IO_L39P_1
PM_IO_3V_16
IO_L37P_1
PM_IO_3V_12
IO_L02N_1
PM_IO_3V_1
IO_L03N_1
PM_IO_3V_3
IO_L39N_1
PM_IO_3V_17
IO_L06N_1
PM_IO_3V_5
IO_L68P_0
PM_IO_80
IO_L68N_0
PM_IO_81
IO_L43N_1
PM_IO_3V_19
IO_L46P_1
PM_IO_3V_24
RXPPAD6
RXPPAD6_A18
RXNPAD6
RXNPAD6_A17
RXPPAD9
RXPPAD9_A5
RXNPAD9
RXNPAD9_A4
TXPPAD18
TXPPAD18_AK13
TXNPAD18
TXNPAD18_AK14
TXPPAD21
TXPPAD21_AK26
TXNPAD21
TXNPAD21_AK27
IO_L31P_7
PM_IO_92
IO_L31N_7
PM_IO_93
IO_L02P_7
PM_IO_84
FPGA Bank
V
CCO
2.5V
2.5V
2.5V
2.5V
3V
3V
3V
3V
3V
3V
2.5V
2.5V
3V
3V
2.5V
2.5V
2.5V
ML310 User Guide
UG068 (v1.01) August 25, 2004
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