High-Speed I/O - Xilinx ML310 User Manual

High-Speed I/O

Table 2-28
Table 2-28: Voltage Monitor Information
Schem Name Voltage
VCC1V5 1.5V
VCC2V5 2.5V
VCC3_PCI 3.0V
VCC3V3 3.3V
VCC5V 5.0V
VTT_DDR 1.25V
MGT_AVCC 2.5V
MGT_VTT 1.8V
VCC3V3_ATX 3.3V
VCC12V_P +12V
VCC12V_N -12V
* Green = Voltage Nominal
* Red = Voltage Fault
High-Speed I/O
Xilinx Virtex-II Pro FPGAs offer a variety of high-speed I/O solutions. The ML310
Embedded Development Platform's high-speed I/O is based on the XC2VP30-FF896
FPGA's RocketIO multi-gigabit transceivers (MGTs) and LVDS capability. The high-speed
I/O signals on the FPGA are accessible through two personality module (PM) connectors,
PM1 and PM2, on the ML310 board. The ML310 is the host board, functioning as the
development platform for Virtex-II Pro FPGA. The PM connectors on the ML310 board
provide a means for extending the functionality of the board through high-speed I/O pins.
Personality modules connect to the ML310 board using Tyco Z-Dok+ docking connectors,
PM1 and PM2. In addition to having differential pairs and shielding ground connections,
Z-Dok+ connectors include utility connections for power, ground, and sensing. Tyco Z-
Dok+ high-speed connectors are rated to 6.25 Gb/s.
Figure 2-19
and PM2 connectors. The plug, located on the ML310 board, is referred to as the host board
connector; the receptacle, located on the personality module, is referred to as the adapter
board connector.
ML310 User Guide
UG068 (v1.01) August 25, 2004
Shows the various Voltage monitor information.
*Indicator
Testpoint
LED
TP17 DS8
TP14 DS6
TP10 DS4
TP8 DS2
TP16 DS7
TP13 DS5
N/A DS3
N/A DS1
TP20 N/A
TP18 N/A
TP19 N/A
shows a personality module connected to the ML310 board through the PM1
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Notes
Regulated FPGA Core voltage
Regulated FPGA / Board Logic
Regulated FPGA PCI Bank 1-2 Voltage
Regulated PCI/Misc Logic
From ATX Supply, All Regulators Derive Power
Regulated DDR Termination (SSTL2)
Regulated MGT Power
Regulated MGT Power
Not used
Direct from ATX Supply
Direct from ATX Supply
R
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