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Board Hardware
Table 2-14
IIC bus.
Note:
U37
Virtex-II Pro
FPGA
XC2VP30
ML310 User Guide
UG068 (v1.01) August 25, 2004
shows a block diagram of the FPGA in relation to the SMBus accelerator and the
Either the XC2VP30 or the ALi M1535D+ can master the IIC bus but not simultaneously
IIC Bus
U15
PCI Bus
ALi
Southbridge
M1535 D+
Figure 2-14: SMBus and IIC Block Diagram
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U27
SMBUS
Accelerator
LTC1694
U20
Temperature
Voltage
Temp
VCC12V_P
Monitor
VCC5V
VCC2V5
VVCC3_PCI
ADDR:
0x5C
VCC1V5
LM87
U22
RTClock
ADDR:
0xA2
RTC8566
U21
EEPROM
ADDR:
0xA0
24LC64
P7
SPD
Note: Located on
EEPROM
DDR DIMM P7
R
51
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