Snda Control Register; Snda Data Register - Epson S1C17W12 Technical Manual

Bit 2 SINV
This bit selects an output pin drive mode.
1 (R/W): Normal drive mode
0 (R/W): Direct drive mode
For more information, refer to "Output Pin Drive Mode."
Bits 1–0 MOSEL[1:0]
These bits select a sound output mode.

SNDA Control Register

Register name Bit
SNDCTL 15–9 –
8
7–1 –
0
Bits 15–9 Reserved
Bit 8 SSTP
This bit stops sound output.
1 (W): Stop sound output
0 (W): Ineffective
1 (R): In stop process
0 (R): Stop process completed/Idle
The SNDCTL.SSTP bit is used to stop buzzer output in normal buzzer mode. After 1 is written, this
bit is cleared to 0 when the sound output has completed. Also in one-shot buzzer mode/melody mode,
writing 1 to this bit can forcibly terminate the sound output.
Bits 7–1 Reserved
Bit 0 MODEN
This bit enables the SNDA operations.
1 (R/W): Enable SNDA operations (The operating clock is supplied.)
0 (R/W): Disable SNDA operations (The operating clock is stopped.)

SNDA Data Register

Register name Bit
SNDDAT 15
14
13–8 SLEN[5:0]
7–0 SFRQ[7:0]
This register functions as a sound buffer. Writing data to this register starts sound output. For detailed information
on the setting data, refer to "Buzzer output waveform configuration (normal buzzer mode/one-shot buzzer mode)"
and "Melody output waveform configuration."
Bit 15 MDTI
This bit specifies a tie or slur (continuous play with the previous note) in melody mode.
1 (R/W): Enable tie/slur
0 (R/W): Disable tie/slur
This bit is ignored in normal buzzer mode/one-shot buzzer mode.
S1C17W12/W13 TECHNICAL MANUAL
(Rev. 1.2)
Table 16.6.3 Sound Output Mode Selection
SNDSEL.MOSEL[1:0] bits
0x3
0x2
0x1
0x0
Bit name Initial
0x00
SSTP 0
0x00
MODEN 0
Bit name Initial
MDTI 0
MDRS 0
0x00
0xff
Seiko Epson Corporation
16 SOUND GENERATOR (SNDA)
Sound output mode
Reserved
Melody mode
One-shot buzzer mode
Normal buzzer mode
Reset R/W
– R –
H0 R/W
– R
H0 R/W
Reset R/W
H0 R/W –
H0 R/W
H0 R/W
H0 R/W
Remarks
Remarks
16-11