Epson S1C17W12 Technical Manual page 297

APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Address Register name
0x421c P1MODSEL
(P1 Port Mode Select
Register)
0x421e P1FNCSEL
(P1 Port Function
Select Register)
0x4220 P2DAT
(P2 Port Data
Register)
0x4222 P2IOEN
(P2 Port Enable
Register)
0x4224 P2RCTL
(P2 Port Pull-up/down
Control Register)
0x4226 P2INTF
(P2 Port Interrupt
Flag Register)
0x4228 P2INTCTL
(P2 Port Interrupt
Control Register)
0x422a P2CHATEN
(P2 Port Chattering
Filter Enable
Register)
0x422c P2MODSEL
(P2 Port Mode Select
Register)
0x422e P2FNCSEL
(P2 Port Function
Select Register)
0x4230 P3DAT
(P3 Port Data
Register)
0x4232 P3IOEN
(P3 Port Enable
Register)
0x423c P3MODSEL
(P3 Port Mode Select
Register)
AP-A-8
Bit Bit name
15–8 –
7–0 P1SEL[7:0]
15–14 P17MUX[1:0]
13–12 P16MUX[1:0]
11–10 P15MUX[1:0]
9–8 P14MUX[1:0]
7–6 P13MUX[1:0]
5–4 P12MUX[1:0]
3–2 P11MUX[1:0]
1–0 P10MUX[1:0]
15 –
14–8 P2OUT[6:0]
7 –
6–0 P2IN[6:0]
15 –
14–8 P2IEN[6:0]
7 –
6–0 P2OEN[6:0]
15 –
14–8 P2PDPU[6:0]
7 –
6–0 P2REN[6:0]
15–8 –
7 –
6–0 P2IF[6:0]
15 –
14–8 P2EDGE[6:0]
7 –
6–0 P2IE[6:0]
15–8 –
7 –
6–0 P2CHATEN[6:0]
15–8 –
7 –
6–0 P2SEL[6:0]
15–14 –
13–12 P26MUX[1:0]
11–10 P25MUX[1:0]
9–8 P24MUX[1:0]
7–6 P23MUX[1:0]
5–4 P22MUX[1:0]
3–2 P21MUX[1:0]
1–0 P20MUX[1:0]
15–10 –
9–8 P3OUT[1:0]
7–0 –
15–8 –
7–2 –
1–0 P3OEN[1:0]
15–8 –
7–2 –
1–0 P3SEL[1:0]
Seiko Epson Corporation
Initial Reset R/W
0x00 – R
0x00 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0 – R
0x00 H0 R/W
0 – R
0x00 H0 R
0 – R
0x00 H0 R/W
0 – R
0x00 H0 R/W
0 – R
0x00 H0 R/W
0 – R
0x00 H0 R/W
0x00 – R
0 – R
0x00 H0 R/W
0 – R
0x00 H0 R/W
0 – R
0x00 H0 R/W
0x00 – R
0 – R
0x00 H0 R/W
0x00 – R
0 – R
0x00 H0 R/W
0x0 – R
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x00 – R
0x0 H0 R/W
0x00 – R
0x00 – R
0x00 – R
0x0 H0 R/W
0x00 – R
0x00 – R
0x0 H0 R/W
S1C17W12/W13 TECHNICAL MANUAL
Remarks
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Cleared by writing 1.
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(Rev. 1.2)