Epson S1C17W12 Technical Manual page 308

Address Register name
0x526a T16_2INTF
(T16 Ch.2 Interrupt
Flag Register)
0x526c T16_2INTE
(T16 Ch.2 Interrupt
Enable Register)
0x5300–0x530a
Address Register name
0x5300 SNDCLK
(SNDA Clock Control
Register)
0x5302 SNDSEL
(SNDA Select
Register)
0x5304 SNDCTL
(SNDA Control
Register)
0x5306 SNDDAT
(SNDA Data
Register)
0x5308 SNDINTF
(SNDA Interrupt Flag
Register)
0x530a SNDINTE
(SNDA Interrupt
Enable Register)
0x5320–0x5332
Address Register name
0x5320 REMCLK
(REMC2 Clock Con-
trol Register)
0x5322 REMDBCTL
(REMC2 Data Bit
Counter Control
Register)
S1C17W12/W13 TECHNICAL MANUAL
(Rev. 1.2)
APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Bit Bit name
15–8 –
7–1 –
0 UFIF
15–8 –
7–1 –
0 UFIE
Bit Bit name
15–9 –
8 DBRUN
7 –
6–4 CLKDIV[2:0]
3–2 –
1–0 CLKSRC[1:0]
15–12 –
11–8 STIM[3:0]
7–3 –
2 SINV
1–0 MOSEL[1:0]
15–9 –
8 SSTP
7–1 –
0 MODEN
15 MDTI
14 MDRS
13–8 SLEN[5:0]
7–0 SFRQ[7:0]
15–9 –
8 SBSY
7–2 –
1 EMIF
0 EDIF
15–8 –
7–2 –
1 EMIE
0 EDIE
Bit Bit name
15–9 –
8 DBRUN
7–4 CLKDIV[3:0]
3–2 –
1–0 CLKSRC[1:0]
15–10 –
9 PRESET
8 PRUN
7–5 –
4 REMOINV
3 BUFEN
2 TRMD
1 REMCRST
0 MODEN
Seiko Epson Corporation
Initial Reset R/W
0x00 – R
0x00 – R
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
Sound Generator (SNDA)
Initial Reset R/W
0x00 – R
0 H0 R/W
0 – R
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 – R
0 H0 R/W
0x0 H0 R/W
0x00 – R
0 H0 R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x00 H0 R/W
0xff H0 R/W
0x00 – R
0 H0 R
0x00 – R
1 H0 R
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0 H0 R/W
IR Remote Controller (REMC2)
Initial Reset R/W
0x00 – R
0 H0 R/W
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 – R
0 H0/S0 R/W
0 H0/S0 R/W
0x0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 W
0 H0 R/W
Remarks
–
Cleared by writing 1.
–
Remarks
–
–
–
–
–
Cleared by writing to the
SNDDAT register.
Cleared by writing 1 or writ-
ing to the SNDDAT register.
–
Remarks
–
–
Cleared by writing 1 to the
REMDBCTL.REMCRST bit.
–
AP-A-19