Uart2 Ch.n Interrupt Enable Register - Epson S1C17W12 Technical Manual

UART2 Ch.n Interrupt Enable Register

Register name Bit
UAnINTE 15–8 –
7
6
5
4
3
2
1
0
Bits 15–7 Reserved
Bit 6 TENDIE
Bit 5 FEIE
Bit 4 PEIE
Bit 3 OEIE
Bit 2 RB2FIE
Bit 1 RB1FIE
Bit 0 TBEIE
These bits enable UART2 interrupts.
1 (R/W): Enable interrupts
0 (R/W): Disable interrupts
The following shows the correspondence between the bit and interrupt:
UAnINTE.TENDIE bit: End-of-transmission interrupt
UAnINTE.FEIE bit:
UAnINTE.PEIE bit:
UAnINTE.OEIE bit:
UAnINTE.RB2FIE bit: Receive buffer two bytes full interrupt
UAnINTE.RB1FIE bit: Receive buffer one byte full interrupt
UAnINTE.TBEIE bit: Transmit buffer empty interrupt
S1C17W12/W13 TECHNICAL MANUAL
(Rev. 1.2)
Bit name Initial
0x00
– 0
TENDIE 0
FEIE 0
PEIE 0
OEIE 0
RB2FIE 0
RB1FIE 0
TBEIE 0
Framing error interrupt
Parity error interrupt
Overrun error interrupt
Seiko Epson Corporation
Reset R/W
– R –
– R
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
12 UART (UART2)
Remarks
12-13