Chapter 9 Watchdog Timer; Functions Of Watchdog Timer - NEC 78K0/KB1+ Preliminary User's Manual

9.1 Functions of Watchdog Timer

The watchdog timer is used to detect an inadvertent program loop. If a program loop is detected, an internal reset
signal is generated.
When a reset occurs due to the watchdog timer, bit 4 (WDTRF) of the reset control flag register (RESF) is set to 1.
For details of RESF, see CHAPTER 16 RESET FUNCTION.
During Ring-OSC Clock Operation
11
f /2 (8.53 ms)
R
12
f /2 (17.07 ms)
R
13
f /2 (34.13 ms)
R
14
f /2 (68.27 ms)
R
15
f /2 (136.53 ms)
R
16
f /2 (273.07 ms)
R
17
f /2 (546.13 ms)
R
18
f /2 (1.09 s)
R
Remarks 1. f
The operation mode of the watchdog timer (WDT) is switched according to the option byte setting of the on-chip
Ring-OSC as shown in Table 9-2.
172

CHAPTER 9 WATCHDOG TIMER

Table 9-1. Loop Detection Time of Watchdog Timer
Loop Detection Time
: Ring-OSC clock oscillation frequency
R
2. f : High-speed system clock oscillation frequency
XP
3. Figures in parentheses apply to operation at f
Preliminary User's Manual U16846EJ1V0UD
During High-Speed System Clock Operation
µ
13
f /2 (819.2 s)
XP
14
f /2 (1.64 ms)
XP
15
f /2 (3.28 ms)
XP
16
f /2 (6.55 ms)
XP
17
f /2 (13.11 ms)
XP
18
f /2 (26.21 ms)
XP
19
f /2 (52.43 ms)
XP
20
f /2 (104.86 ms)
XP
= 240 kHz (TYP.), f
R
= 10 MHz
XP