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Sampling time
A/D converter
Sampling
operation
Undefined
SAR
ADCR
INTAD
A/D conversion operations are performed continuously until bit 7 (ADCS) of the A/D converter mode register (ADM)
is reset (0) by software.
If any of ADM, the analog input channel specification register (ADS), power-fail comparison mode register (PFM),
or power-fail comparison threshold register (PFT) is written during an A/D conversion operation, the conversion
operation is initialized, and if the ADCS bit is set (1), conversion starts again from the beginning.
RESET input makes the A/D conversion result register (ADCR) undefined.
190
CHAPTER 10 A/D CONVERTER
Figure 10-9. Basic Operation of A/D Converter
Conversion time
A/D conversion
Preliminary User's Manual U16846EJ1V0UD
Conversion
result
Conversion
result
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