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(2) Capture/compare control register 00 (CRC00)
This register controls the operation of the 16-bit timer capture/compare registers (CR000, CR010).
CRC00 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears CRC00 to 00H.
Figure 6-6. Format of Capture/Compare Control Register 00 (CRC00)
Address: FFBCH
After reset: 00H
Symbol
7
CRC00
0
CRC002
0
1
CRC001
0
1
CRC000
0
1
Cautions 1. Timer operation must be stopped before setting CRC00.
2. When the mode in which clear & start occurs on a match between TM00 and CR000 is
selected with 16-bit timer mode control register 00 (TMC00), CR000 should not be specified
as a capture register.
3. The capture operation is not performed if both the rising and falling edges are specified as
the valid edge of the TI000 pin.
4. To ensure that the capture operation is performed properly, the capture trigger requires a
pulse two cycles longer than the count clock selected by prescaler mode register 00
(PRM00).
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
R/W
6
5
0
0
CR010 operating mode selection
Operates as compare register
Operates as capture register
Captures on valid edge of TI010 pin
Captures on valid edge of TI000 pin by reverse phase
CR000 operating mode selection
Operates as compare register
Operates as capture register
Preliminary User's Manual U16846EJ1V0UD
4
3
2
0
0
CRC002
CR000 capture trigger selection
1
0
CRC001
CRC000
111
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