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(2) 8-bit timer compare register 50 (CR50)
CR50 can be read and written by an 8-bit memory manipulation instruction.
Except in PWM mode, the value set in CR50 is constantly compared with the 8-bit timer counter 50 (TM50) count
value, and an interrupt request (INTTM50) is generated if they match.
In PWM mode, when the TO50 pin becomes high level due to a TM50 overflow and the values of TM50 and
CR50 match, the TO50 pin becomes inactive.
The value of CR50 can be set within 00H to FFH.
RESET input clears this register to 00H.
Figure 7-3. Format of 8-Bit Timer Compare Register 50 (CR50)
Address: FF17H
Symbol
CR50
Cautions 1. In the clear & start mode entered on a match of TM50 and CR50 (TMC506 = 0), do not write
other values to CR50 during operation.
2. In PWM mode, make the CR50 rewrite period 3 count clocks of the count clock (clock
selected by TCL50) or more.
144
CHAPTER 7 8-BIT TIMER/EVENT COUNTER 50
After reset: 00H
R/W
Preliminary User's Manual U16846EJ1V0UD
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