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(6) A/D conversion result register (ADCR)
The result of A/D conversion is loaded from the successive approximation register (SAR) to this register each
time A/D conversion is completed, and the ADCR register holds the result of A/D conversion in its higher 10 bits
(the lower 6 bits are fixed to 0).
(7) Controller
When A/D conversion has been completed or when the power-fail detection function is used, this controller
compares the result of A/D conversion (value of the ADCR register) and the value of the power-fail comparison
threshold register (PFT). It generates the interrupt INTAD only if a specified comparison condition is satisfied as
a result.
(8) AV
pin
REF
This pin inputs an analog power/reference voltage to the A/D converter. Always use this pin at the same potential
as that of the V
pin even when the A/D converter is not used.
DD
The signal input to ANI0 to ANI3 is converted into a digital signal, based on the voltage applied across AV
AV
.
SS
In the standby mode, the current flowing through the series resistor string can be reduced by lowering the voltage
input to the AV
pin to the AV
REF
(9) AV
pin
SS
This is the ground potential pin of the A/D converter. Always use this pin at the same potential as that of the V
pin even when the A/D converter is not used.
(10) A/D converter mode register (ADM)
This register is used to set the conversion time of the analog input signal to be converted, and to start or stop the
conversion operation.
(11) Analog input channel specification register (ADS)
This register is used to specify the port that inputs the analog voltage to be converted into a digital signal.
(12) Power-fail comparison mode register (PFM)
This register is used to set the power-fail monitor mode.
(13) Power-fail comparison threshold register (PFT)
This register is used to set the threshold value that is to be compared with the value of the A/D conversion result
register (ADCR).
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CHAPTER 10 A/D CONVERTER
level.
SS
Preliminary User's Manual U16846EJ1V0UD
and
REF
SS
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