Part 3.21: Alinx Customized Fan - Alinx ZYNQ UltraScale+ AXU9EGB User Manual

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+1.2V

Part 3.21: ALINX Customized Fan

Because ZU9EG generates a lot of heat when it works normally, we add a
heat sink and fan to the chip on the board to prevent the chip from overheating.
The control of the fan is controlled by the ZYNQ chip. The control pin is
connected to the IO of the BANK50 (PIN J10). If the IO level output is high, the
MOSFET is turned on and the fan is working. If the IO level output is low, the
fan stops. The fan design on the board is shown in Figure 3-21-1.
The fan has been screwed to the FPGA development board before leaving
the factory. The power of the fan is connected to the socket of J55. The red is
positive and the black is negative.
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Ethernet, USB2.0, SD, DP, CAN, RS485
Figure 3-21-1：Fan Design Schematic
AXU9EGB User Manual
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