Alinx ZYNQ UltraScale+ AXU9EGB User Manual page 52

connected to the IO of BANK43, level standard It is 3.3V.
The circuit schematic of the MIPI interface part is shown in Figure 3-14-1
below:
Figure 3-14-1: MIPI camera interface design schematic
MIPI interface pin assignment
Signal Name
MIPI_CLK_P
MIPI_CLK_N
MIPI_LAN0_P
MIPI_LAN0_N
MIPI_LAN1_P
MIPI_LAN1_N
CAM_GPIO
CAM_CLK
52 / 66
ZYNQ Pin Name
B67_L1_P
B67_L1_N
B67_L2_P
B67_L2_N
B67_L3_P
B67_L3_N
B44_L6_P
B44_L6_N
AXU9EGB User Manual
ZYNQ Pin
Number
W12 MIPI Input Clock Positive
W11 MIPI Input Clock Negative
T13 MIPI Input Date LANE0 Positive
R13 MIPI Input Date LANE0 Negative
U10 MIPI Input Date LANE1 Positive
T10 MIPI Input Date LANE1 Negative
AK13 GPIO Control of Camera
AL12
Description
Clock Input of Camera
www.alinx.com