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Alinx AXKU040 User Manual

Kintex ultrascale fpga development board
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KINTEX UltraScale FPGA
Development Board
AXKU040
User Manual

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  • Page 1 KINTEX UltraScale FPGA Development Board AXKU040 User Manual...

  • Page 2: Version Record

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Version Record Version Date Release By Description Rev 1.1 2021-09-13 Rachel Zhou First Release www.alinx.com 2 / 59...

  • Page 3: Table Of Contents

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Table of Contents Version Record.......................2 Part 1: FPGA Development Board Introduction..........4 Part 2: FPGA Chip....................8 Part 3: DDR4 DRAM...................10 Part 4: QSPI Flash....................15 Part 5: Clock configuration.................16 Part 5.1: 200Mhz differential clock source..........16 Part 5.2: 125Mhz differential clock source..........16...

  • Page 4: Part 1: Fpga Development Board Introduction

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 1: FPGA Development Board Introduction The AXKU040 FPGA development board is mainly composed of KINTEX UltraScale+ chip. It meets users' requirements for high-speed data exchange, data storage, Video transmission processing, deep learning, artificial intelligence and industrial control, and it is a "professional"...
  • Page 5 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Through this diagram, you can see the interfaces and functions that the AXKU040 FPGA Development Board contains:  Xilinx KINTEX-7 UltraScale FPGA chip XCKU040  DDR4 With four large-capacity 1GB (4 GB total) high-speed DDR4 SDRAM, used as FPGA data storage, image analysis cache, data processing.
  • Page 6 3 standard FMC expansion port, including 2 LPC FMC expansion ports and 1 HPC FMC expansion port, which can be connected to various FMC modules of XILINX or ALINX (HDMI input and output modules, binocular camera modules, high-speed AD modules, etc.).
  • Page 7 KINTEX UltraScale+ FPGA Board AXKU040 User Manual  LED Light 6LEDs, 1 power indicator, 1 DONE configuration indicator, 4 user indicators  Key 2 user keys, 1 reset key, connect to the normal IO of the FPGA. www.alinx.com 7 / 59...

  • Page 8: Part 2: Fpga Chip

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 2: FPGA Chip The FPGA development board uses Xilinx's KINTEX UltraScale FPGA chip, model number XCKU040-2FFVA1156I. The speed class is 2 and the temperature class is industrial. This model is a FFVA1156 package with 1156 pins and a 1.0mm pitch.
  • Page 9 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FPGA power supply system XCKU040 FPGA power supplies are V CCINT CCBRAM, CCAUX, CCAUX_IO CCO, is the FPGA core power MGTAVCC MGTAVTT MGTVCCAUK MGTAVTTRCAL CCADC CCINT supply pin, which needs to be connected to 0.95V; V...

  • Page 10: Part 3: Ddr4 Dram

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 3: DDR4 DRAM The AXKU040 FPGA development board is equipped with four Micron 1GB DDR4 chips, model MT40A512M16LY-062EIT. Four DDR4 SDRAMs form a 64-bit bus width. Because four DDR4 chips are connected to the FPGA,...
  • Page 11 KINTEX UltraScale+ FPGA Board AXKU040 User Manual 4 DDR4 DRAM pin assignments: Signal Name FPGA Pin Name FPGA Pin PL_DDR4_DQ0 IO_L3N_T0L_N5_AD15N_44 AE20 PL_DDR4_DQ1 IO_L2N_T0L_N3_44 AG20 PL_DDR4_DQ2 IO_L2P_T0L_N2_44 AF20 PL_DDR4_DQ3 IO_L5P_T0U_N8_AD14P_44 AE22 PL_DDR4_DQ4 IO_L3P_T0L_N4_AD15P_44 AD20 PL_DDR4_DQ5 IO_L6N_T0U_N11_AD6N_44 AG22 PL_DDR4_DQ6 IO_L6P_T0U_N10_AD6P_44 AF22...
  • Page 12 KINTEX UltraScale+ FPGA Board AXKU040 User Manual PL_DDR4_DQ34 IO_L2N_T0L_N3_46 AM27 PL_DDR4_DQ35 IO_L6N_T0U_N11_AD6N_46 AK28 PL_DDR4_DQ36 IO_L5P_T0U_N8_AD14P_46 AH27 PL_DDR4_DQ37 IO_L5N_T0U_N9_AD14N_46 AH28 PL_DDR4_DQ38 IO_L3P_T0L_N4_AD15P_46 AK26 PL_DDR4_DQ39 IO_L3N_T0L_N5_AD15N_46 AK27 PL_DDR4_DQ40 IO_L9N_T1L_N5_AD12N_46 AN28 PL_DDR4_DQ41 IO_L12N_T1U_N11_GC_46 AM30 PL_DDR4_DQ42 IO_L8P_T1L_N2_AD5P_46 AP28 PL_DDR4_DQ43 IO_L11N_T1U_N9_GC_46 AM29 PL_DDR4_DQ44 IO_L9P_T1L_N4_AD12P_46 AN27...
  • Page 13 KINTEX UltraScale+ FPGA Board AXKU040 User Manual PL_DDR4_DM6 IO_L13P_T2L_N0_GC_QBC_46 AJ29 PL_DDR4_DM7 IO_L19P_T3L_N0_DBC_AD9P_46 AL32 PL_DDR4_DQS0_P IO_L4P_T0U_N6_DBC_AD7P_44 AG21 PL_DDR4_DQS0_N IO_L4N_T0U_N7_DBC_AD7N_44 AH21 PL_DDR4_DQS1_P IO_L10P_T1U_N6_QBC_AD4P_44 AH24 PL_DDR4_DQS1_N IO_L10N_T1U_N7_QBC_AD4N_44 AJ25 PL_DDR4_DQS2_P IO_L16P_T2U_N6_QBC_AD3P_44 AJ20 PL_DDR4_DQS2_N IO_L16N_T2U_N7_QBC_AD3N_44 AK20 PL_DDR4_DQS3_P IO_L22P_T3U_N6_DBC_AD0P_44 AP20 PL_DDR4_DQS3_N IO_L22N_T3U_N7_DBC_AD0N_44 AP21 PL_DDR4_DQS4_P IO_L4P_T0U_N6_DBC_AD7P_46 AL27...
  • Page 14 KINTEX UltraScale+ FPGA Board AXKU040 User Manual PL_DDR4_RAS_B IO_L8N_T1L_N3_AD5N_45 AM19 PL_DDR4_CAS_B IO_L8P_T1L_N2_AD5P_45 AL19 PL_DDR4_CKE IO_L14N_T2L_N3_GC_45 AJ16 PL_DDR4_ACT_B IO_L21N_T3L_N5_AD8N_45 AF18 PL_DDR4_CLK_N IO_L22N_T3U_N7_DBC_AD0N_45 AE15 PL_DDR4_CLK_P IO_L22P_T3U_N6_DBC_AD0P_45 AE16 PL_DDR4_CS_B IO_L21P_T3L_N4_AD8P_45 AE18 PL_DDR4_OTD IO_L17P_T2U_N8_AD10P_45 AG19 PL_DDR4_PAR IO_L20N_T3L_N3_AD1N_45 AF14 PL_DDR4_RST IO_L15N_T2L_N5_AD11N_45 AG16 www.alinx.com 14 / 59...

  • Page 15: Part 4: Qspi Flash

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 4: QSPI Flash The AXKU040 FPGA development board is equipped with one 128MBit Quad-SPI FLASH, and the model is N25Q128A, which uses the 3.3V CMOS voltage standard. Due to the non-volatile nature of QSPI FLASH, it can store FPGA configuration Bin files and other user data files in use.

  • Page 16: Part 5: Clock Configuration

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 5: Clock configuration Part 5.1: 200Mhz differential clock source A differential 200MHz clock source is provided on the FPGA development board to provide the system clock to the FPGA. The crystal differential output is connected to the FPGA BANK45, which can be used to drive the DDR controller operating clock and other user logic in the FPGA.

  • Page 17: Part 5.3: 156.25Mhz Differential Clock Source

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual 5-2. Figure 5-2: 125Mhz System Clock Source Schematic System Clock pin assignments: Signal Name FPGA Pin SFP_CLK0_P SFP_CLK0_N Part 5.3: 156.25Mhz differential clock source A differential 156.25MHz clock source is provided on the FPGA development board to provide the clock to the FPGA Transceiver GTH.
  • Page 18 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Figure 5-1: 156.25Mhz System Clock Source Schematic System Clock pin assignments: Signal Name FPGA Pin HDMI_DRU_CLOCK_P HDMI_DRU_CLOCK_N www.alinx.com 18 / 59...

  • Page 19: Part 6: Usb To Serial Port

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 6: USB to Serial Port The AXKU040 FPGA development board is equipped with a Uart to USB interface for serial communication and debugging of the development board. The conversion chip uses the USB-UAR chip of Silicon Labs CP2102GM. The CP2102 serial chip and the FPGA are connected by a level-shifting chip to adapt to different FPGA BANK voltages.

  • Page 20: Part 7: Sfp+ Optical Fiber Interface

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 7: SFP+ Optical fiber interface The AXKU040 FPGA development board has a four SFP interface. The Users can buy SFP optical modules (1.25G, 2.5G, 10G optical modules on the market) and insert them into these 4 optical fiber interfaces for optical fiber data communication.
  • Page 21 KINTEX UltraScale+ FPGA Board AXKU040 User Manual SFP1_RX_P SFP1 Data Receiver (Positive) SFP1_RX_P SFP1 Data Receiver (Negative) SFP1_TX_DIS AM10 SFP1 Optical Transfer Disable, active high SFP1_LOSS AK11 SFP1 Optical LOSS,High level means no light signal is received The 2 fiber interface FPGA pin assignment is as follows:...

  • Page 22: Part 8: Hdmi Video Output Interface

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 8: HDMI Video Output Interface The HDMI output interface uses the ADV7511 HDMI (DVI) encoding chip from ANALOG DEVICE, which supports up to 1080P@60Hz output and 3D output. The video digital interface, audio digital interface and I2C configuration interface of ADV7511 are connected to the IO of BANK47 and BANK48.
  • Page 23 KINTEX UltraScale+ FPGA Board AXKU040 User Manual HDMI_D0 IO_L20N_T3L_N3_AD1N_48 HDMI Video Signal Data 0 HDMI_D1 IO_L19N_T3L_N1_DBC_AD9N_48 HDMI Video Signal Data 1 HDMI_D2 IO_L22N_T3U_N7_DBC_AD0N_48 HDMI Video Signal Data 2 HDMI_D3 IO_L19P_T3L_N0_DBC_AD9P_48 HDMI Video Signal Data 3 HDMI_D4 IO_L21N_T3L_N5_AD8N_48 HDMI Video Signal Data 4...

  • Page 24: Part 9: Gigabit Ethernet Interface

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 9: Gigabit Ethernet Interface There are 2 Gigabit Ethernet ports on the AXKU040 FPGA Development board. The GPHY chip uses Micrel's KSZ9031RNX Ethernet PHY chip to provide users with network communication services. The KSZ9031RNX chip supports 10/100/1000 Mbps network transmission rate, and communicates with the MAC layer of the system through the RGMII interface.
  • Page 25 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Figure 9-1: FPGA Chip and GPHY connection diagram The 1 Gigabit Ethernet interface pin assignments are as follows: Signal Name Pin Name Description Number PHY1_GTXC IO_L4N_T0U_N7_DBC_AD7N_66 Ethernet 1 Transmit Clock PHY1_TXD0 IO_L14N_T2L_N3_GC_66 Ethernet 1 Transmit Data bit0...
  • Page 26 KINTEX UltraScale+ FPGA Board AXKU040 User Manual The 2 Gigabit Ethernet interface pin assignments are as follows: Signal Name Pin Name Description Number IO_L10P_T1U_N6_QBC_AD4P Ethernet 2 Transmit Clock PHY2_GTXC PHY2_TXD0 IO_L17P_T2U_N8_AD10P_67 Ethernet 2 Transmit Data bit0 PHY2_TXD1 IO_L17N_T2U_N9_AD10N_67 Ethernet 2 Transmit Data bit1...

  • Page 27: Part 10: Fmc Expansion Port

    The AXKU040 FPGA development board comes with two standard FMC LPC expansion ports and one standard FMC HPC expansion ports that can be connected to various FMC modules of XILINX or ALINX (HDMI input and output modules, binocular camera modules, high-speed AD modules, etc.). The FMC expansion port contains 33 pairs of differential IO signals and one I2C bus signal.
  • Page 28 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Figure 10-1：LPC FMC1 Connector Diagram Figure 10-2：LPC FMC2 Connector Diagram www.alinx.com 28 / 59...
  • Page 29 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Figure 10-3：LPC FMC3 Connector Diagram The 1 FMC LPC Connectors Pin Assignment Signal Name FPGA Pin Number FPGA Pin Description Name FMC Reference 1 FMC1_LPC_CLK0_P IO_L11P_T1U_N8_GC_47 Reference Clock P FMC Reference 1 FMC1_LPC_CLK0_N...
  • Page 30 KINTEX UltraScale+ FPGA Board AXKU040 User Manual ( Clock ) N FMC Reference 1 Data FMC1_LPC_LA01_CC_P IO_L13P_T2L_N0_GC_QBC_47 ( Clock ) P FMC Reference 1 Data FMC1_LPC_LA01_CC_N IO_L13N_T2L_N1_GC_QBC_47 ( Clock ) N FMC Reference 2 Data FMC1_LPC_LA02_P IO_L10P_T1U_N6_QBC_AD4P_47 AB21 FMC Reference 2...
  • Page 31 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC Reference 10 FMC1_LPC_LA10_P IO_L5P_T0U_N8_AD14P_47 AA27 Data P FMC Reference 10 FMC1_LPC_LA10_N IO_L5N_T0U_N9_AD14N_47 AB27 Data N FMC Reference 11 FMC1_LPC_LA11_P IO_L18P_T2U_N10_AD2P_47 Data P FMC Reference 11 FMC1_LPC_LA11_N IO_L18N_T2U_N11_AD2N_47 Data N FMC Reference 12...
  • Page 32 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Data P FMC Reference 19 FMC1_LPC_LA19_N IO_L7N_T1L_N1_QBC_AD13N_48 AG32 Data N FMC Reference 20 FMC1_LPC_LA20_P IO_L6P_T0U_N10_AD6P_48 AF30 Data P FMC Reference 20 FMC1_LPC_LA20_N IO_L6N_T0U_N11_AD6N_48 AG30 Data N FMC Reference 21 FMC1_LPC_LA21_P IO_L10P_T1U_N6_QBC_AD4P_48 AE33 Data P...
  • Page 33 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC Reference 28 FMC1_LPC_LA28_N IO_L17N_T2U_N9_AD10N_48 AB34 Data N FMC Reference 29 FMC1_LPC_LA29_P IO_L18P_T2U_N10_AD2P_48 AC33 Data P FMC Reference 29 FMC1_LPC_LA29_N IO_L18N_T2U_N11_AD2N_48 AD33 Data N FMC Reference 30 FMC1_LPC_LA30_P IO_L2P_T0L_N2_48 AE28 Data P FMC Reference 30...
  • Page 34 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC Reference 0 Data FMC2_LPC_LA00_CC_P IO_L12P_T1U_N10_GC_64 AG11 ( Clock ) P FMC Reference 0 Data FMC2_LPC_LA00_CC_N IO_L12N_T1U_N11_GC_64 AH11 ( Clock ) N FMC Reference 1 Data FMC2_LPC_LA01_CC_P IO_L13P_T2L_N0_GC_QBC_64 AF10 ( Clock ) P...
  • Page 35 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC Reference 9 Data FMC2_LPC_LA09_N IO_L9N_T1L_N5_AD12N_64 AF12 FMC Reference 10 Data FMC2_LPC_LA10_P IO_L5P_T0U_N8_AD14P_64 AK12 FMC Reference 10 Data FMC2_LPC_LA10_N IO_L5N_T0U_N9_AD14N_64 AL12 FMC Reference 11 Data FMC2_LPC_LA11_P IO_L17P_T2U_N8_AD10P_64 FMC Reference 11 Data FMC2_LPC_LA11_N IO_L17N_T2U_N9_AD10N_64...
  • Page 36 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC Reference 18 Data FMC2_LPC_LA18_CC_N IO_L11N_T1U_N9_GC_A11_D27_65 M26 ( Clock ) N IO_L15P_T2L_N4_AD11P_A02_D18 FMC Reference 19 Data FMC2_LPC_LA19_P IO_L15N_T2L_N5_AD11N_A03_D19 FMC Reference 19 Data FMC2_LPC_LA19_N IO_L16P_T2U_N6_QBC_AD3P_A00 FMC Reference 20 Data FMC2_LPC_LA20_P _D16_65 IO_L16N_T2U_N7_QBC_AD3N_A01 FMC Reference 20...
  • Page 37 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC Reference 28 Data FMC2_LPC_LA28_P IO_L5P_T0U_N8_AD14P_A22_65 FMC Reference 28 Data FMC2_LPC_LA28_N IO_L5N_T0U_N9_AD14N_A23_65 FMC Reference 29 Data FMC2_LPC_LA29_P IO_L3P_T0L_N4_AD15P_A26_65 FMC Reference 29 Data FMC2_LPC_LA29_N IO_L3N_T0L_N5_AD15N_A27_65 FMC Reference 30 Data FMC2_LPC_LA30_P IO_L2P_T0L_N2_FOE_B_65 FMC Reference 30...
  • Page 38 KINTEX UltraScale+ FPGA Board AXKU040 User Manual The 3 FMC HPC Connectors Pin Assignment Signal Name FPGA Pin Number FPGA Pin Description Name FMC Reference 1 FMC_HPC_CLK0_M2C_P IO_L11P_T1U_N8_GC_67 Reference Clock P FMC Reference 1 FMC_HPC_CLK0_M2C_N IO_L11N_T1U_N9_GC_67 Reference Clock N FMC Reference 2...
  • Page 39 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC LA Reference 6 Data FMC_HPC_LA06_N IO_L9N_T1L_N5_AD12N_67 FMC LA Reference 7 Data FMC_HPC_LA07_P IO_L1P_T0L_N0_DBC_67 FMC LA Reference 7 Data FMC_HPC_LA07_N IO_L1N_T0L_N1_DBC_67 FMC LA Reference 8 Data FMC_HPC_LA08_P IO_L7P_T1L_N0_QBC_AD13P_67 FMC LA Reference 8 Data...
  • Page 40 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Data N FMC LA Reference 16 FMC_HPC_LA16_P IO_L22P_T3U_N6_DBC_AD0P_67 G20 Data P FMC LA Reference 16 FMC_HPC_LA16_N IO_L22N_T3U_N7_DBC_AD0N_67 F20 Data N FMC LA Reference 17 FMC_HPC_LA17_CC_P IO_L11P_T1U_N8_GC_66 Data ( Clock ) P FMC LA Reference 17...
  • Page 41 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC LA Reference 25 FMC_HPC_LA25_P IO_L1P_T0L_N0_DBC_66 Data P FMC LA Reference 25 FMC_HPC_LA25_N IO_L1N_T0L_N1_DBC_66 Data N FMC LA Reference 26 FMC_HPC_LA26_P IO_L18P_T2U_N10_AD2P_66 Data P FMC LA Reference 26 FMC_HPC_LA26_N IO_L18N_T2U_N11_AD2N_66 Data N FMC LA Reference 27...
  • Page 42 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Data ( Clock ) P FMC HA Reference 0 FMC_HA00_CC_N IO_L12N_T1U_N11_GC_68 Data ( Clock ) N FMC HA Reference 1 FMC_HA01_CC_P IO_L11P_T1U_N8_GC_68 Data ( Clock ) P FMC HA Reference 1 FMC_HA01_CC_N IO_L11N_T1U_N9_GC_68...
  • Page 43 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC HA Reference 9 FMC_HA09_N IO_L22N_T3U_N7_DBC_AD0N_68 J18 Data N FMC HA Reference 10 FMC_HA10_P IO_L9P_T1L_N4_AD12P_68 Data P FMC HA Reference 10 FMC_HA10_N IO_L9N_T1L_N5_AD12N_68 Data N FMC HA Reference 11 FMC_HA11_P IO_L21P_T3L_N4_AD8P_68 Data P...
  • Page 44 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Data N FMC HA Reference 19 FMC_HA19_P IO_L5P_T0U_N8_AD14P_68 Data P FMC HA Reference 19 FMC_HA19_N IO_L5N_T0U_N9_AD14N_68 Data N FMC HA Reference 20 FMC_HA20_P IO_L6P_T0U_N10_AD6P_68 Data P FMC HA Reference 20 FMC_HA20_N IO_L6N_T0U_N11_AD6N_68 Data N...
  • Page 45 KINTEX UltraScale+ FPGA Board AXKU040 User Manual FMC_DP3_M2C_P MGTHRXP0_228 Transceiver Data 3 Input P FMC_DP3_M2C_N MGTHRXN0_228 Transceiver Data 3 Input N FMC_DP4_M2C_P MGTHRXP3_227 Transceiver Data 4 Input P FMC_DP4_M2C_N MGTHRXN3_227 Transceiver Data 4 Input N FMC_DP5_M2C_P MGTHRXP2_227 Transceiver Data 5 Input P...
  • Page 46 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Transceiver Data 7 Output FMC_DP7_C2M_P MGTHTXP0_227 Transceiver Data 7 Output FMC_DP7_C2M_N MGTHTXN0_227 www.alinx.com 46 / 59...

  • Page 47: Part 11: Sd Card Slot

    Driven by these leading manufacturers, SD cards have become the most widely used memory card in consumer digital devices. The AXKU040 FPGA development board includes a Micro SD card interface to provide users with access to SD card memory for storing pictures, music or other user data files.
  • Page 48 KINTEX UltraScale+ FPGA Board AXKU040 User Manual SD Card Slot pin assignment: Signal FPGA Pin FPGA Pin Description Name Number SD_CLK SD Clock Signal IO_L22P_T3U_N6_DBC_AD0P_64 SD_CMD SD Command Signal IO_L21N_T3L_N5_AD8N_64 SD_D0 SDData0 IO_L24N_T3U_N11_64 SD_D1 SDData1 IO_L22N_T3U_N7_DBC_AD0N_64 SD_D2 SDData2 IO_L23P_T3U_N8_64 SD_D3...

  • Page 49: Part 12: Sma And Sata Interface

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 12: SMA and SATA Interface The AXKU040 FPGA development board is designed with 6 SMA interfaces, which are connected to the BANK225 high-speed transceiver , including a pair of TX, a pair of RX, and a pair of clock signals. Provide customers with high-speed external interfaces.
  • Page 50 KINTEX UltraScale+ FPGA Board AXKU040 User Manual SMA_RX_N MGTHRXN3_225 Transceiver Signal Input The schematic diagram of FPGA and SATA interface connection is shown in Figure 12-2. Figure 12-2: SATA Connection Schematic SATA Interface pin assignment: Signal Name FPGA Pin FPGA Pin...

  • Page 51: Part 13: Temperature Sensor

    Part 13: Temperature Sensor A high-precision, low-power, digital temperature sensor chip is mounted on the AXKU040 FPGA development board, and the model is LM75 of ON Semiconductor. The temperature accuracy of the LM75 chip is 0.5 degrees. The sensor and FPGA are directly connected to the I2C digital interface. The FPGA reads the temperature near the current FPGA development board through the I2C interface.

  • Page 52: Part 14: Jtag Interface

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 14: JTAG Interface A JTAG interface is reserved JTAG interface one the AXKU040 FPGA development board for downloading FPGA programs or firmware to FLASH. In order to prevent damage to the FPGA chip caused by hot plugging, a protection diode is added to the JTAG signal to ensure that the voltage of the signal is within the range accepted by the FPGA to avoid damage of the FPGA chip.

  • Page 53: Part 15: Led Light

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 15: LED Light There are Six red LEDs on the AXKU040 FPGA development board, one of which is the power indicator (PWR), one is DONE indicator,four are users LED lights. When the AXKU040 FPGA board is powered on, the power indicator will light up;...
  • Page 54 KINTEX UltraScale+ FPGA Board AXKU040 User Manual Pin assignment of user LED lights Signal Name FPGA Pin FPGA Pin Description Number User LED1 LED1 IO_L22N_T3U_N7_DBC_AD0N_D05_65 User LED2 LED2 IO_L22P_T3U_N6_DBC_AD0P_D04_65 User LED3 LED3 IO_L23N_T3U_N9_I2C_SDA_65 User LED4 LED3 IO_L23P_T3U_N8_I2C_SCLK_65 FPGA Configuration FPGA_DONE...

  • Page 55: Part 16: Keys

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 16: Keys The AXKU040 FPGA development board contains two user Keys and 1 reset key. Two user keys are connected to the IO of FPGA BANK65.The user key is active at low level to realize some functions of the board for customers;...

  • Page 56: Part 17: Power Supply

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 17: Power Supply The power input voltage of the AXKU040 FPGA development board is DC12V, and the external +12V power supply supplies power to the FPGA development board. The Power supply design diagram shown in Figure 18-1.
  • Page 57 KINTEX UltraScale+ FPGA Board AXKU040 User Manual +1.2 V/ 500mA Auxiliary Voltage, Gigabit Chip MGTAVCC(+1.0V) FPGA Chip Voltage MGTAVTT(+1.2V) FPGA Chip Voltage DDR4 pull-up voltage DDRVTT（0.6V） FPGA chip voltage, Level shift voltage, Voltage on FMC FMC2_VADJ（1.8V） MGT_1.8V (+1.2V) FPGA GTH auxiliary voltage www.alinx.com...

  • Page 58: Part 18: Fan

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 18: Fan Because AXKU040 FPGA development board generates a lot of heat when it works normally, we add a heat sink and fan to the chip on the board to prevent the chip from overheating. The control of the fan is controlled by the FPGA Chip.

  • Page 59: Part 19: Form Factory

    KINTEX UltraScale+ FPGA Board AXKU040 User Manual Part 19: Form Factory Figure 19-1: Form Factor (Top View) www.alinx.com 59 / 59...

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