Intel Pentium III Processor 512K Design Manual page 4

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LV Intel Pentium III Processor 512K Dual Processor Platform
6.0 Thermals
................................................................................................................................... 38
6.1 THERMTRIP# Requirements ............................................................................................. 38
6.2 THERMTRIP# Erratum ....................................................................................................... 38
7.0 System Design Checklist
7.1 Introduction ......................................................................................................................... 40
7.2 Host Interface AGTL Bus and AGTL Signals...................................................................... 40
7.3 CMOS (Non-AGTL) Signals................................................................................................ 41
7.4 TAP/ITP Checklist............................................................................................................... 42
7.5 Miscellaneous Checklist ..................................................................................................... 42
Figures
1 Sample Board Stackup ................................................................................................................. 9
2 Micro-FCBGA Component Keepout ........................................................................................... 10
3 Micro-FCBGA Package - Top and Bottom Isometric Views ...................................................... 12
4 System Bus T-Topology ............................................................................................................. 14
5 Wired-OR Termination Topology ................................................................................................ 16
6 Simple Terminations ................................................................................................................... 20
7 TCK Termination, DP System .................................................................................................... 21
8 PRDYx# Signal Termination ....................................................................................................... 21
9 RESET# Signal Termination....................................................................................................... 22
10 JTAG Signals TDI/TDO for Processor Only ............................................................................... 23
11 Host Bus Clock Connections ...................................................................................................... 24
12 Single Ended Clocking Topology - CPU ..................................................................................... 25
13 Single Ended Clocking Topology................................................................................................ 25
14 CLKREF Filter Implementation ................................................................................................... 27
15 Single-Ended Clock BSEL Circuit (133 MHz) ............................................................................. 28
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16 Ideal LV Intel
17 Power Distribution for a DP System Motherboard ...................................................................... 31
18 Detailed Power Distribution Model ............................................................................................. 32
19 VRM 8.5 Board Power Distribution Model .................................................................................. 32
20 1206 Capacitor Pad and Via Layouts ......................................................................................... 34
21 Processor PLL Filter ................................................................................................................... 36
22 PLL Power Low Pass Filter Response ....................................................................................... 37
23 LV Intel Pentium
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Pentium III Processor 512K Power Supply Scheme ........................................ 31
processor 512K Example THERMTRIP# Workaround Circuit..................... 39
III
Design Guide