®
®
LV Intel
Pentium
III Processor 512K Dual Processor Platform
Additional guidelines on board stack-up, placement, and layout include the following.
The board impedance (Z) should be between 49.5 Ω and 60.5 Ω (55 Ω ± 10% is
•
recommended).
•
The dielectric process variation in the PCB fabrication should be minimized.
•
The ground plane should not be split on the ground plane layer.
•
Keep vias for decoupling capacitors as close to the capacitor pads as possible.
2.2
Micro-FCBGA Component Keepout
Figure 2 shows the keepout zones and dimensions for the Micro-FCBGA package. Table 2
provides the values for the mechanical specifications.
Figure 2. Micro-FCBGA Component Keepout
7 (K1)
8 places
D1
10
5 (K)
4 places
E1
35 (E)
NOTE: All dimensions in millimeters. Values shown are for reference only
SUBSTRATE KEEPOUT ZONE
DO NOT CONTACT PACKAGE
INSIDE THIS LINE
A2
35 (D)
K2
PIN A1 CORNER
0.20
A
Ø 0.78 (b)
479 places
Design Guide
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