Voltage Sequencing; Meeting Dual Processor Power Requirements; Supplying Voltage; Decoupling Technology And Transient Response - Intel Pentium III Processor 512K Design Manual

Multiple voltages required for a dual processor system are Vcc
V . Refer to the Low Voltage Intel
SS
location of these voltages.
5.3.3

Voltage Sequencing

When designing a system with multiple voltages, there is always the issue of ensuring that no
damage occurs to the system during voltage sequencing. Voltage sequencing is the timing
relationship between two or more voltages. Sequencing applies to the power voltage levels and the
levels of other crucial signals when the user turns the power supply on or off, or the system enters a
failure condition. Systems should be designed such that neither supply stays on for extended time
while the other is off. Excessive exposure to these conditions can compromise long-term
component reliability.
For more information on the power-up sequence, refer to the Low Voltage Intel
Processor 512K Datasheet.
5.4

Meeting Dual Processor Power Requirements

Intel recommends that designers use a VRM 8.5 compliant regulator for LV Intel Pentium
processor 512K baseboard designs. Place high frequency and bulk decoupling capacitors as needed
between the VRM 8.5 and the processor to ensure voltage fluctuations remain in specification.
The processor power supply design requires trade-offs between power supply, distribution and
decoupling technologies. This section provides step by step instruction for designing a system that
uses the more accurate power distribution model shown in Figure 18.
5.4.1

Supplying Voltage

Local (point of load) regulation is recommended for the LV Intel Pentium
satisfy the higher current requirements and to maintain power converter output voltage tolerance.
For example, a DC-to-DC converter, placed close to the load, converts a higher DC voltage to a
lower level using either a linear or switching regulator. Distributing lower current at a higher
voltage to the converter minimizes unwanted losses (I x R) and localizes losses to the planes
between the converter and the processor sockets.
It is recommended that voltage regulator solutions employ differential remote sense (as illustrated
in Figure 19) to compensate for voltage drops between the regulators and the socket pins. The
sense lines should be terminated as close to the center of the socket as possible and should not have
an impedance greater than 1 Ω.
5.4.2

Decoupling Technology and Transient Response

Inductance of the system due to cables and power planes reduces the power supply's ability to
respond quickly to a current transient. Decoupling a power plane can be characterized by several
zones of interest. The closer to the load the capacitor is placed, the more inductance that is
bypassed. By bypassing the inductance of leads, power planes, etc., less capacitance is required.
However, closer to the load there is less room for capacitance. Therefore trade-offs must be made.
The LV Intel Pentium
current occur at the transition between low power mode and high power mode. It is the
responsibility of the system designer to provide adequate high frequency decoupling to manage the
Design Guide
® ®
LV Intel Pentium III Processor 512K Dual Processor Platform
® ®
Pentium III
processor 512K causes large switching transients. These sharp surges of
III
, V , V
CORE REF
Processor 512K Datasheet document for the pin
III
, Vcc , and
TT CMOS1.5
® ®
Pentium
III
III
processor 512K to
33