Intel core 2 extreme processor qx6800 and intel core 2 extreme processor qx9770 thermal and mechanical design guidelines (123 pages)
Summary of Contents for Intel 5148LV - Xeon Dual Core Active H
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® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet August 2007 Reference Number: 313355-003...
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Check with your vendor for more information. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Intel, Pentium, Intel Xeon, Intel SpeedStep, Intel Extended Memory 64 Technology, Intel Virtualization Technology, and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
Processor Mass Specifications ................42 Processor Materials.................... 43 Processor Land Coordinates ................43 Land Listing ....................... 45 ® ® Dual-Core Intel Xeon Processor 5100 Series Pin Assignments ......45 4.1.1 Land Listing by Land Name ..............45 4.1.2 Land Listing by Land Number ..............55 Signal Definitions .......................
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Dual-Core Intel Xeon Processor 5100 Series Load Current versus Time ....31 Dual-Core Intel® Xeon® Processor 5160 Load Current versus Time ......32 Dual-Core Intel® Xeon® Processor 5100 Series VCC Static and Transient Tolerance Load Line ...............33 Dual-Core Intel® Xeon® Processor LV 5148/5138/5128 VCC Static and Transient Tolerance Load Lines .............34...
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Dual-Core Intel® Xeon® Processor LV 5148 and Dual-Core Intel® Xeon® Processor LV 5128 Thermal Profile ........79 Dual-Core Intel® Xeon® Processor 5160 Thermal Profiles A and B ......80 Case Temperature (TCASE) Measurement Location ..........82 Thermal Monitor 2 Frequency and Voltage Ordering ..........84 PECI Topology ....................
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Revision Description Date Initial release June 2006 Updated Sections 2, 3, and 6 with SKUs for 5148/5138/5128 November 2006 Updated Sections 2, 3, and 6 with G-step information. August 2007 § ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
Core™ micro-architecture, it is binary compatible with previous Intel Architecture (IA-32) processors. The Dual-Core Intel Xeon Processor 5100 series are scalable to two processors in a multiprocessor system, providing exceptional performance for applications running on advanced operating systems such as Windows* XP, Windows Server 2003, Linux*, and UNIX*.
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Features Dual-Core Intel® Xeon® Processor 5100 Series Datasheet...
EM64T) as an enhancement to Intel's IA-32 architecture. This enhancement allows the processor to execute operating systems and applications written to take advantage of the 64-bit extension technology. Further details on Intel Extended Memory 64 Technology and its programming model can be found in the 64- bit Extension Technology Software Developer's Guide at http://developer.intel.com/...
Introduction Monitor software enabling multiple, independent software environments inside a single platform. Further details on Intel Virtualization Technology can be found at http:// developer.intel.com/technology/vt. ® ® The Dual-Core Intel Xeon Processor 5100 Series are intended for high performance ® ®...
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• Dual-Core Intel® Xeon® Processor 5160- A performance optimized version of the Dual-Core Intel® Xeon® Processor 5100 Series. For this document “Dual-Core Intel® Xeon® Processor 5160” is used to call out specifications that are unique to the Dual-Core Intel® Xeon® Processor 5160 SKU.
Extended Memory 64 Technology (Intel EM64T) – An enhancement to Intel's IA-32 architecture that allows the processor to execute operating systems and applications written to take advantage of the 64-bit extension technology. Further details on can be found in the 64-bit Extension Technology Software Developer's Guide at http://developer.intel.com/.
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NEBS(TM) Requirements: Physical Protection (GR-63-CORE) http://telecom- info.telcordia.com Electromagnetic Compatibility and Electrical Safety - Generic Criteria for http://telecom- Network Telecomminications Equipment (GR-1089-CORE) info.telcordia.com Note: Contact your Intel representative for the latest revision of these documents. § ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
AGTL+ signals are based on flight time as opposed to capacitive deratings. Analog signal simulation of the FSB, including trace lengths, is highly recommended when designing a system. Contact your Intel Field Representative to obtain the processor signal integrity models, which includes buffer and package models.
BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the ® ® processor. As in previous processor generations, the Dual-Core Intel Xeon Processor 5100 Series core frequency is a multiple of the BCLK[1:0] frequency. The processor bus ratio multiplier is set during manufacturing.
Listed frequencies illustrate clock frequency multipliers and are not necessarily committed production ® ® frequencies for 40 W, 65 W or 80 W versions of Dual-Core Intel Xeon Processor 5100 Series. Individual processors operate only at or below the frequency marked on the package.
Bus Clock Frequency Reserved Reserved Reserved 2.4.2 PLL Power Supply ® ® An on-die PLL filter solution is implemented on the Dual-Core Intel Xeon Processor ® ® 5100 Series. The input is used for this configuration in Dual-Core Intel Xeon CCPLL Processor 5100 Series based platforms.
When the “111111” VID pattern is observed, the voltage regulator output should be disabled. ® ® Shading denotes the expected VID range of the Dual-Core Intel Xeon Processor 5100 Series. The VID range includes VID transitions that may be initiated by thermal events, assertion of the FORCEPR# signal (see ®...
Table 2-5. Loadline Selection Truth Table for LL_ID[1:0] LL_ID1 LL_ID0 Description Reserved ® ® Dual-Core Intel Xeon Processor 5100 Series Reserved Reserved Note: The LL_ID[1:0] signals are used to select the correct loadline slope for the processor. Table 2-6. Market Segment Selection Truth Table for MS_ID[1:0]...
TAP chain and followed by any other components within the system. A translation buffer should be used to connect to the rest of the chain unless one of the other components is capable of ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
Platform Environment Control Interface (PECI). PECI is a proprietary one-wire bus interface that provides a communication channel between Intel processor and chipset components to external thermal monitoring devices. More detailed information may be found in Section 6.3.
FSB frequency, core frequency, power segments, and have the same internal cache sizes. Mixing components operating at different internal clock frequencies is not supported and will not be validated by Intel. Combining processors from different power segments is also not supported.
For functional operation, please refer to the processor case temperature specifications. This rating applies to the processor and does not include any tray or packaging. Failure to adhere to this specification can affect the long-term reliability of the processor. ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
Processor DC Specifications The processor DC specifications in this section are defined at the processor ® core (pads) unless noted otherwise. See Section 4-1 for the Dual-Core Intel ® Xeon Processor 5100 Series land listings and Section 5.1 for signal definitions.
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Unit 1,13 for V supply before V stable for V supply after V stable Thermal Design Current 6,15 CC_TDC (TDC) Dual-Core Intel® Xeon® Processor LV 5148/ 5138/5128 Thermal Design Current 6,15 CC_TDC ® (TDC) Dual-Core Intel ® Xeon Processor 5100...
This parameter is based on design characterization and is not tested. 16. I is specified at 1.2 V. Figure 2-2. Dual-Core Intel® Xeon® Processor LV 5148/5138/5128 Processor Load Current versus Time 0 .0 1 0 .1...
Electrical Specifications Not 100% tested. Specified by design characterization. Figure 2-4. Dual-Core Intel® Xeon® Processor 5160 Load Current versus Time 0.01 1 00 1 000 Time Duration (s) Notes: Processor or Voltage Regulator thermal protection circuitry should not trip for load currents greater than CC_TDC Not 100% tested.
Enterprise Voltage Regulator Down (EVRD) 11.0 Design Guidelines for socket load line guidelines and VR implementation. Please refer to the appropriate platform design guide for details on VR implementation. Figure 2-5. Dual-Core Intel® Xeon® Processor 5100 Series V Static and Transient Tolerance Load Line...
Electrical Specifications Figure 2-6. Dual-Core Intel® Xeon® Processor LV 5148/5138/5128 V Static and Transient Tolerance Load Lines Icc [A] Icc [A] VID - 0.000 VID - 0.000 VID - 0.020 VID - 0.020 Maximum Maximum VID - 0.040 VID - 0.040 VID - 0.060...
0 V and V 2.13.1 Overshoot Specification ® ® The Dual-Core Intel Xeon Processor 5100 Series can tolerate short transient overshoot events where V exceeds the VID voltage when transitioning from a high- to-low current load condition. This overshoot cannot exceed VID + V...
VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands. Overshoot events that are < 10 ns in duration may be ignored. These measurements of processor die level overshoot should be taken with a 100 MHz bandwidth limited oscilloscope. § ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
Mechanical Specifications Mechanical Specifications ® ® The Dual-Core Intel Xeon Processor 5100 Series is packaged in a Flip Chip Land Grid Array (FC-LGA6) package that interfaces to the baseboard via a LGA771 socket. The package consists of a processor core mounted on a pinless substrate with 771 lands. An integrated heat spreader (IHS) is attached to the package substrate and core and serves as the interface for processor component thermal solutions such as a heatsink.
Processor Package Drawing (Sheet 1 of 3) Note: Guidelines on potential IHS flatness variation with socket load plate actuation and installation of the cooling solution is available in the processor Thermal/Mechanical Design Guidelines. ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
It is a relatively slow bending event compared to shock and vibration tests. For more information on the transient bend limits, please refer to the MAS document entitled ® Manufacturing with Intel components using 771-land LGA package that interfaces with the motherboard via a LGA771 socket.
Processor 5100 Series can be inserted and removed 15 times from an LGA771 socket. Processor Mass Specifications ® ® The typical mass of the Dual-Core Intel Xeon Processor 5100 Series is 21.5 grams [0.76 oz.]. This includes all components which make up the entire processor product. ®...
Mechanical Specifications Processor Materials ® ® The Dual-Core Intel Xeon Processor 5100 Series is assembled from several components. The basic material properties are described in Table 3-3. Table 3-3. Processor Materials Component Material Integrated Heat Spreader (IHS) Nickel over copper...
Land Listing ® ® Dual-Core Intel Xeon Processor 5100 Series Pin Assignments This section provides sorted land list in Table 4-1 Table 4-2. Table 4-1 is a listing of all processor lands ordered alphabetically by land name. Table 4-2 is a listing of all processor lands ordered by land number.
This allows parity to be high when all the covered signals are ® high. AP[1:0]# must be connected to the appropriate pins of all Dual-Core Intel ® Xeon Processor 5100 Series FSB agents.
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All FSB agents must operate at the same frequency. For more information about these signals, including termination recommendations, refer to the appropriate platform design guideline. ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
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DBR# is used by a debug port interposer so that an in-target probe can drive system reset. If a debug port connector is implemented in the system, DBR# is ® ® a no-connect on the Dual-Core Intel Xeon Processor 5100 Series package. DBR# is not a processor signal.
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When STPCLK# is not asserted, FERR#/PBE# is similar to the ERROR# signal on the Intel 387 coprocessor, and is included for compatibility with systems using MS-DOS*-type floating-point error reporting. When STPCLK# is asserted, an assertion of FERR#/PBE# indicates that the processor has a pending break event waiting for service.
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The LL_ID[1:0] signals are used to select the correct loadline slope for the processor. These signals are not connected to the processor die. A logic 0 is pulled to ground and ® ® a logic 1 is a no-connect on the Dual-Core Intel Xeon Processor 5100 Series package.
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(thus halting program execution) in an attempt to reduce the processor junction temperature. To protect the processor its core voltage (V ) must be removed following the assertion of THERMTRIP#. Intel also recommends the removal of V when THERMTRIP# is asserted.
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V on the motherboard. VTT_SEL The VTT_SEL signal is used to select the correct V voltage level for the processor. ® ® VTT_SEL is a no-connect on the Dual-Core Intel Xeon Processor 5100 Series package. Notes: ® ®...
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Signal Definitions ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
Note: The boxed processor will ship with a component thermal solution. Refer to Section 8 details on the boxed processor. For the Dual-Core Intel® Xeon® Processor LV 5128, follow the Dual-Core Intel® Xeon® Processor LV 5148 Thermal Profile. 6.1.1 Thermal Specifications...
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45°C, and the Short-Term Thermal Profile is defined at an ambient operating temperature of 60°C. Both of these thermal profiles ensure adherence to Intel reliability requirements. It is expected that the Thermal Control Circuit (TCC) would only be activated for very brief periods of time when running the most power intensive applications.
Table 2-3. FMB, or Flexible Motherboard, guidelines provide a design target for meeting all planned processor frequency requirement. This applies to the Dual-Core Intel® Xeon® Processor 5160 beginning with the G-step. The B-step specifications can be found in Table 6-8.
Power [W] Notes: Please refer to Table 6-2 for discrete points that constitute the thermal profile. ® ® Refer to the Dual-Core Intel Xeon Processor 5100 Series Thermal/Mechanical Design Guidelines for system and environmental implementation details. ® ® Table 6-2.
Short-Term Thermal Profile for a duration longer than the limits specified in Note 2 above, do not meet the processor’s thermal specifications and may result in permanent damage to the processor. Refer to the Dual-Core Intel® Xeon® Processor LV 5138 in Embedded Applications Thermal/Mechanical Design Guideline for system and environmental implementation details.
Thermal Specifications FMB, or Flexible Motherboard, guidelines provide a design target for meeting all planned processor frequency requirements These values only apply to the B-step of the Dual-Core Intel® Xeon® Processor 5160. For the G-step specifications, please refer to Table 6-1.
6.2.1 Thermal Monitor Features ® ® Dual-Core Intel Xeon Processor 5100 Series provides two thermal monitor features, Thermal Monitor (TM1) and Enhanced Thermal Monitor (TM2). The Thermal Monitor and Enhanced Thermal Monitor must both be enabled in BIOS for the processor to be operating within specifications.
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Processor 5100 Series Thermal/Mechanical Design Guidelines or information on designing a thermal solution. For the Dual-Core Intel® Xeon® Processor LV 5138, it is anticipated that the TCC would only be activated for very short periods of time when running the most power intensive applications.
Demand” mode and is distinct from the Thermal Monitor and Thermal Monitor 2 features. On-Demand mode is intended as a means to reduce system level power ® ® consumption. Systems utilizing the Dual-Core Intel Xeon Processor 5100 Series must not rely on software usage of this mechanism to limit the processor temperature.
TCC will be active when PROCHOT# is asserted. The processor can be configured to generate an interrupt upon the assertion or de-assertion of PROCHOT#. Refer to the Intel Architecture Software Developer’s Manual and the Conroe and Woodcrest Processor Family BIOS Writer’s Guide for specific register and programming details.
5-1). At this point, the FSB signal THERMTRIP# will go active and stay active as described in Table 5-1. THERMTRIP# activation is independent of processor activity and does not generate any bus cycles. Intel also recommends the removal of V Platform Environment Control Interface (PECI) 6.3.1 Introduction ®...
Xeon Processor 5100 ® ® Series , TControl represented a diode temperature. With Dual-Core Intel Xeon Processor 5100 Series , TControl represents an offset from TCC activation temperature.The DTS outputs temperature offsets over the PECI interface in response to a GetTemp0() command and these offsets are relative values vs. an absolute values.
PECI Device Address The socket 0 PECI register resides at address 0x30 and socket 1 resides at 0x31. 6.3.2.2 PECI Command Support ® ® The Dual-Core Intel Xeon Processor 5100 Series supports the PECI commands listed Table 6-11: ® ®...
Table 6-12. GetTemp0() Error Codes Error Code Description 0x8000 General sensor error Sensor is operational, but has detected a temperature below its operational range 0x8002 (underflow), currently 30 C absolute temperature. § ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
Features Features Power-On Configuration Options ® Several configuration options can be configured by hardware. The Dual-Core Intel ® Xeon Processor 5100 Series samples its hardware configuration at reset, on the active-to-inactive transition of RESET#. For specifics on these options, please refer to Table 7-1.
RESET# will cause the processor to immediately initialize itself. The return from a System Management Interrupt (SMI) handler can be to either ® Normal Mode or the HALT state. See the IA-32 Intel Architecture Software Developer's Manual, Volume III: System Programming Guide for more information.
Features Table 7-2. Extended HALT Maximum Power B-step Symbol Parameter Unit Notes Extended HALT State EXTENDED_HALT Power Dual-Core Intel® Xeon® Processor LV 5148 Extended HALT State 24/27 EXTENDED_HALT Power ® Dual-Core Intel ® Xeon Processor 5100 Series Extended HALT State...
Stop-Grant state. A transition back to the Normal state will occur with the de- assertion of the STPCLK# signal. A transition to the Grant Snoop state will occur when the processor detects a snoop on the front side bus (see Section 7.2.4.1). ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
Xeon Processor 5100 Series are capable of supporting ® Enhanced Intel SpeedStep Technology. More details on which processor frequencies will support this feature is provided in the Dual-Core Intel® Xeon® Processor 5100 Series Specification Update. ® ® Dual-Core Intel Xeon...
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In order to run at reduced power consumption, the voltage is altered in step with the bus ratio. ® The following are key features of Enhanced Intel SpeedStep Technology: • Multiple voltage/frequency operating points provide optimal performance at reduced power consumption.
Boxed Processor Specifications Boxed Processor Specifications Introduction Intel boxed processors are intended for system integrators who build systems from ® ® components available through distribution channels. The Dual-Core Intel Xeon Processor 5100 Series will be offered as an Intel boxed processor.
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Xeon Processor 5100 Series 2U Passive Heat Sink ® ® Figure 8-3. 2U Passive Dual-Core Intel Xeon Processor 5100 Series Thermal Solution (Exploded View) Notes: The heat sinks represented in these images are for reference only, and may not represent the final boxed processor heat sinks.
Figure 8-4 through Figure 8-8. Figure 8-9 through Figure 8-10 are the mechanical drawings for the 4-pin board fan header and 4-pin connector used for the active CEK fan heat sink solution. ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
3-wire designs. When operating in thermistor controlled mode, fan RPM is automatically varied based on the TINLET temperature measured by a thermistor located at the fan inlet of the heat sink solution. ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
It is assumed that a 40°C TLA is met. This requires a superior chassis design to limit the TRISE at or below 5°C with an external ambient temperature ® of 35°C. Following these guidelines will allow the designer to meet Dual-Core Intel ® Xeon Processor 5100 Series Thermal Profile and conform to the thermal requirements of the processor.
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They are as follows: • CEK Spring (supplied by baseboard vendors) • Heat sink standoffs (supplied by chassis vendors) § ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...
Specific connectivity and layout guidelines for the Debug Port are provided in the Debug Port Design Guide for UP/DP Systems and the appropriate platform design guidelines. Logic Analyzer Interface (LAI) Intel is working with two logic analyzer vendors to provide logic analyzer interfaces ® ® (LAIs) for use in debugging Dual-Core Intel Xeon Processor 5100 Series systems.
Contact the logic analyzer vendor for electrical specifications and load models for the LAI solution they provide. § ® ® Dual-Core Intel Xeon Processor 5100 Series Datasheet...