Analog Devices AD5100 Manual page 26

Register Read/ Permanently
Address Write Settable
0x16 R/W No
0x17 R/W No
0x18 R/W No
0x19 Read- No
only
1
Default settings of AD5100-0 evaluation model only.
2
V must be 0 V (that is, V must be configured in edge sensitive mode) for software power-down.
2MON 2MON
3 These register bits are set only. To clear them, the AD5100 must be power cycled. In some cases, the AD5100 can be connected to an I
Setting these bits is an added means of ensuring that any erroneous activity on the bus does not cause AD5100 special functions to become active.
Register Name and Bit Description
Special function 1
Bit No. Description
[0] Reserved
[1] Reserved
[2] 0: software assertion of SHDN pin is inactive
1: pulls SHDN pin low
[3] 0: override of permanent settings inactive
1: override of permanent settings active
[7:4] Reserved
Special function 2
Bit No. Description
[0] 0: software power-down of AD5100 inactive
1: software power-down of AD5100 active
[7:1] Reserved
3
Disable special functions
Bit No. Description
[0] 0: allows override of any of the registers in memory except
Register 0x16 Bit[2:0] and Register 0x17 Bit[0]
1: disables override of any of the registers in memory except
Register 0x16 Bit[2:0] and Register 0x17 Bit[0]
[1] Reserved
[2] Reserved
[3] 0: allows software power-down function
1: disables software power-down function
[4] 0: allows software assertion of SHDN pin
1: disables software assertion of SHDN pin
[7:5] Reserved
Fault detect and status
(Bits[3:0] are level triggered bits that indicate the current state of the
comparators monitoring the V
triggered fault detection bits that indicate what error conditions were present
when a SHDN event occurred)
Bit No. Description
[0] 1 = V input < V
2MON
[1] 1 = V input > V
2MON
[2] 1 = V input < V
1MON
[3] 1 = V input > V
1MON
[6:4] 000: none
001: V UV only
1MON
010: V OV only
1MON
011: never occurred
100: V below off only (default)
2MON
101: V UV and V
1MON
110: V OV and V
1MON
111: never occurred
[7] Reserved
Rev. A | Page 25 of 36
2
and V input pins; Bits[6:4] are edge
1MON 2MON
off threshold
2MON
on threshold
2MON
UV threshold
1MON
OV threshold
1MON
below off both occurred
2MON
below off both occurred
2MON
AD5100
NonOTP Power-On
1
Default
0x00
0x00
0x00
0x40
2 C bus with lots of activity.