Part 12: Sma And Sata Interface - Alinx AXKU040 User Manual

Part 12: SMA and SATA Interface

The AXKU040 FPGA development board is designed with 6 SMA
interfaces, which are connected to the BANK225 high-speed transceiver ,
including a pair of TX, a pair of RX, and a pair of clock signals. Provide
customers with high-speed external interfaces. In addition, two SATA ports are
reserved on the FPGA board for connecting solid state drives.
The schematic diagram of FPGA and SMA interface connection is shown
in Figure 12-1.
SMA Interface pin assignment:
Signal Name
SMA_CLKP
SMA_CLKN
SMA_TX_P
SMA_TX_N
SMA_RX_P
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KINTEX UltraScale+ FPGA Board AXKU040 User Manual
Figure 12-1: SMA Connection Schematic
FPGA Pin
MGTREFCLK1P_225
MGTREFCLK1N_225
MGTHTXP3_225
MGTHTXN3_225
MGTHRXP3_225
FPGA Pin
Number
Y6 Transceiver Clock Signal
Y5 Transceiver Clock Signal
AC4 Transceiver Signal Output
AC3 Transceiver Signal Output
AB2 Transceiver Signal Input
Description
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