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AXKU040
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Alinx AXKU040 User Manual page 18
Kintex ultrascale fpga development board
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KINTEX UltraScale+ FPGA Board AXKU040 User Manual
Figure 5-1: 156.25Mhz System Clock Source Schematic
System Clock pin assignments:
Signal Name
FPGA Pin
HDMI_DRU_CLOCK_P
H6
HDMI_DRU_CLOCK_N
H5
www.alinx.com
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