Alinx AXKU040 User Manual page 11

4 DDR4 DRAM pin assignments:
Signal Name
PL_DDR4_DQ0
PL_DDR4_DQ1
PL_DDR4_DQ2
PL_DDR4_DQ3
PL_DDR4_DQ4
PL_DDR4_DQ5
PL_DDR4_DQ6
PL_DDR4_DQ7
PL_DDR4_DQ8
PL_DDR4_DQ9
PL_DDR4_DQ10
PL_DDR4_DQ11
PL_DDR4_DQ12
PL_DDR4_DQ13
PL_DDR4_DQ14
PL_DDR4_DQ15
PL_DDR4_DQ16
PL_DDR4_DQ17
PL_DDR4_DQ18
PL_DDR4_DQ19
PL_DDR4_DQ20
PL_DDR4_DQ21
PL_DDR4_DQ22
PL_DDR4_DQ23
PL_DDR4_DQ24
PL_DDR4_DQ25
PL_DDR4_DQ26
PL_DDR4_DQ27
PL_DDR4_DQ28
PL_DDR4_DQ29
PL_DDR4_DQ30
PL_DDR4_DQ31
PL_DDR4_DQ32
PL_DDR4_DQ33
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KINTEX UltraScale+ FPGA Board AXKU040 User Manual
FPGA Pin Name
IO_L3N_T0L_N5_AD15N_44
IO_L2N_T0L_N3_44
IO_L2P_T0L_N2_44
IO_L5P_T0U_N8_AD14P_44
IO_L3P_T0L_N4_AD15P_44
IO_L6N_T0U_N11_AD6N_44
IO_L6P_T0U_N10_AD6P_44
IO_L5N_T0U_N9_AD14N_44
IO_L8N_T1L_N3_AD5N_44
IO_L11P_T1U_N8_GC_44
IO_L8P_T1L_N2_AD5P_44
IO_L12N_T1U_N11_GC_44
IO_L9N_T1L_N5_AD12N_44
IO_L11N_T1U_N9_GC_44
IO_L9P_T1L_N4_AD12P_44
IO_L12P_T1U_N10_GC_44
IO_L14P_T2L_N2_GC_44
IO_L17P_T2U_N8_AD10P_44
IO_L15N_T2L_N5_AD11N_44
IO_L17N_T2U_N9_AD10N_44
IO_L14N_T2L_N3_GC_44
IO_L18N_T2U_N11_AD2N_44
IO_L15P_T2L_N4_AD11P_44
IO_L18P_T2U_N10_AD2P_44
IO_L20P_T3L_N2_AD1P_44
IO_L23P_T3U_N8_44
IO_L20N_T3L_N3_AD1N_44
IO_L21N_T3L_N5_AD8N_44
IO_L24P_T3U_N10_44
IO_L23N_T3U_N9_44
IO_L24N_T3U_N11_44
IO_L21P_T3L_N4_AD8P_44
IO_L2P_T0L_N2_46
IO_L6P_T0U_N10_AD6P_46
FPGA Pin
AE20
AG20
AF20
AE22
AD20
AG22
AF22
AE23
AF24
AJ23
AF23
AH23
AG25
AJ24
AG24
AH22
AK22
AL22
AM20
AL23
AK23
AL25
AL20
AL24
AM22
AP24
AN22
AN24
AN23
AP25
AP23
AM24
AM26
AJ28
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