Part 5.3: 156.25Mhz Differential Clock Source - Alinx AXKU040 User Manual

5-2.
Figure 5-2: 125Mhz System Clock Source Schematic
System Clock pin assignments:

Part 5.3: 156.25Mhz differential clock source

A differential 156.25MHz clock source is provided on the FPGA
development board to provide the clock to the FPGA Transceiver GTH. The
crystal differential output is connected to the FPGA BANK228. The schematic
diagram of the clock source is shown in Figure 5-3.
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KINTEX UltraScale+ FPGA Board AXKU040 User Manual
Signal Name
SFP_CLK0_P
SFP_CLK0_N
FPGA Pin
AF6
AF5
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