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19. SYSTEM SWITCH
19-1. JUMPER SWITCH
For Jumper Switch, switched signals are read by PSC2 in the hardware.
Giving a meaning to it is up to the software.
Main PWB
JP1
1 2 3
JP1
Function
COM3 IRQ assign
JP2
Function
CMOS Initialize
JP0 (Fixed)
Function
Serial3 decode mode
19-2. SPECIAL SYSTEM REGISTER 0 : 07F0H
SSR0
7
6
5
Read
SW7
SW6
SW5
Write
D7
D6
D5
Read
bit7: SW7=JP0 (G/A Serial3 decode mode)
bit6: SW6=JP1 (COM3 IRQ assign)
bit5: SW5=Not use (Floppy Disk Controller)
bit4: SW4=Not use (Drive A: Device)
bit3: SW3=Not use (Boot Drive)
bit2: SW2=Not use (Drive C:, D: & E: Setting)
bit1: SW1=Not use (Drive C:, D: & E: Setting)
bit0: SW0=JP2 (CMOS Initialize)
Since pins except for SW0 16.7 are pulled up, the level is "1" when they
are read.
Write
bit7-0: MD7-0=53h PSC2 Relocatable internal I/O access and SSR0
(07F0h) Read and SSR1 (07F1h) Read/Write allow
MD7-0><53h PSC2 Relocatable internal I/O access and SSR0
(07F0h) Read and SSR1 (07F1h) Read/Write inhibit (Default)
JP2
1 2 3
OFF (value=1)
ON (value=0)
COM3=IRQ11
COM3=IRQ4
OFF (value=1)
ON (value=0)
Not Initialize
Initialize
OFF (value=1)
COM3
4
3
2
SW4
SW3
SW2
SW1
D4
D3
D2
D1
20. SYSTEM MEMORY
Two 168pin DIMM Sockets are provided.
20-1. STANDARD MEMORY
16777216 wordu64bit SDRAM Registered DIMM (Installed)
Single 3.3V(m0.3V) Power Supply
Access time: PC100 or Higher
Refresh: 4096 cycles/64ms(15.625us)
Serial Presence Detect with EEPROM (SPD) support
Error Check & Collect memory (ECC) support
20-2. OPTIONAL MEMORY
16777216 wordu64bit SDRAM Registered DIMM (Max)
Single 3.3V(m0.3V) Power Supply
Access time: PC100 or Higher
Refresh: 4096 cycles/64ms(15.625us)
Serial Presence Detect with EEPROM (SPD) support
Error Check & Collect memory (ECC) support
21. BIOS ROM
Atmel's Flash memory (AT49F040) is used.
5224,288 words x 8bit
22. ANALOG TOUCH PANEL
22-1. OUTLINES
Controlled by Fujitsu control IC (N010-0559-V021). Commands are
given through the Serial Interface from the CPU.
Light Load Input Type
Communication Mode:
Transmission Speed:
1
0
Data Transmission System:Asymmetrical Advance Synchronization
SW0
Signal Level:
D0
Data Format:
Bit Format:
Interface Signal:
Sampling Speed:
UP-5900VS CIRCUIT DESCRIPTION
5 – 50
Full Duplex Communication Mode, Serial
Interface
9600bps
TTL Level
Binary
Start bit (1) + Data bit (8) + Stop bit (1),
non-parity
RXD/TXD
100pps max.
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