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■ ■ ■ ■ POWER AND GROUND PINS
Name
Type
VCC
V
VCC (RTC)
V
VCC (SUS)
V
VCC (USB)
V
VREF
V
VSS
V
VSS (USB)
V
2) Power Planes
PIIX4E has three primary internal power planes. These power planes permit parts of PIIX4E to power down to conserve battery life. Table 3 shows
the internal planes and their uses.
Table3. PIIX4E Internal Power Planes
Power Plane
RTC
Contains the real-time clock and 256 bytes of battery-backed
SRAM. This plane is always powered if the internal RTC is used. If
the internal RTC is not used, it may be connected to the suspend
plane. Typically, powered via "coin-cell" lithium battery.
The input signals attached to the RTC power plane DO NOT SUP-
PORT 5 VOLT INPUT LEVELS. These signals must not exceed
VCC (RTC).
There is no reset signal for this power plane.
SUSPEND
Contains the logic needed to resume from the Suspend-to-Disk and
Suspend-to-RAM states.
This plane will typically be powered by a power supply which is
capable of providing a "trickle" current.
The input signals attached to the SUSPEND power plane DO NOT
SUPPORT 5 VOLT INPUT LEVELS. These signals must not
exceed VCC (SUS).
This plane is reset by assertion of the RSMRST# signal.
USB
Contains the USB input/output buffers.
Core
Contains all the rest of the PIIX4E logic. This plane is powered by
the main system power supply. All input signals within this plane are
5V tolerant except FERR#. This plane is reset by negation of the
PWROK signal.
12. CLOCK GENERATOR
The ICS9248-39 of Integrated Circuit Systems, Inc. is employed as the Clock Generator.
Clock setup is made at Frequency Select Pin (FS0~FS3).
Functionary <Crystal (X1, X2) = 14.31818MHz>
CPU CLOCK
PCI CLOCK(MHz)
66.8MHz
33.40(CPU/2)
CORE VOLTAGE SUPPLY. These pins are the primary voltage supply for the PIIX4E core and IO periphery and
must be tied to 3.3V.
RTC WELL VOLTAGE SUPPLY. This pin is the supply voltage for the RTC logic and must be tied to 3.3V.
SUSPEND WELL VOLTAGE SUPPLY. These pins are the primary voltage supply for the PIIX4E suspend logic and
IO signals and must be tied to 3.3V.
USB VOLTAGE SUPPLY. This pin is the supply voltage for the USB input/output buffers and must be tied to 3.3V.
VOLTAGE REFERENCE. This pin is used to provide a 5V reference voltage for 5V safe input buffers.
VREF must be tied to 5V in a system requiring 5V tolerance. In a 5V tolerant system, this signal must power up
before or simultaneous to VCC. It must power down after or simultaneous to VCC.
In a non-5V tolerant system (3.3V only), this signal can be tied directly to VCC. There are then no sequencing
requirements.
CORE GROUND. These pins are the primary ground for PIIX4E.
USB GROUND. This pin is the ground for the USB input/output buffers.
Description
FS3
0
UP-5900VS CIRCUIT DESCRIPTION
Description
PWROK, RSMRST#, RTCX1,
RTCX2
BATLOW#, CONFIG[1:2], EXTSMI#
GPI1, GPO8, IRQ8#, LID, RI#
SMBALERT#, SMBCLK SMBDATA,
PWRBTN# SUS[A:C]#, SUSCLK
SUS_STAT[1:2]#, TEST#
USBP0+, USBP0-
USBP1+, USBP1-
All Other Signal Pins
FS2
FS1
0
1
5 – 30
Signals Powered
VCC
(RTC)
VCC
(SUS)
VCC
(USB)
VCC
FS0
1
VCC Pins
GND Pins
VSS
VSS
VSS
(USB)
VSS
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