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Next Level Sub-screens / Description
PCH-IO
PCI Express
Configuration>
Configuration>
(continued)
(continued)
www.kontron.com
PCIE Express
PTM>
Root Port
[1 to 4]>
DPC>
(continued)
EDPC>
URR>
FER>
NFER>
CER>
SEFE>
SENFE>
SECE>
PME SCI>
Hot Plug>
Advance Error
Reporting>
PCIE Speed>
Transmitter Half
Swing>
Detect Timeout>
Extra Bus
Reserved>
Reserved
Memory>
Reserved I/O>
COMe-cEL6 - User Guide, Rev.1.2
Precision Time Measurement
Enabled, Disabled]
Downstream Port Containment
[Enabled, Disabled]
Extensions for Downstream Port
Containment
[Enabled, Disabled]
Unsupported Request Reporting
[Enabled, Disabled]
Fatal error reporting
[Enabled, Disabled]
Non- Fatal error reporting
[Enabled, Disabled]
Correctable error reporting
[Enabled, Disabled]
System error on fatal error
[Enabled, Disabled]
System error on non-fatal error
[Enabled, Disabled]
System error on correctable error
[Enabled, Disabled]
[Enabled, Disabled]
[Enabled, Disabled]
[Enabled, Disabled]
Configure PCIe Speed
[Auto, Gen1, Gen2, Gen3]
[Enabled, Disabled]
Time (msec) the reference code
waits for link to exit detect state for
enabling ports before assuming no
device and potentially disabling the
port.
[0]
Extra bus reserved (0-7) for bridges
behind this root bridge [0]
Range (1-20 MB) for this root port.
[10]
Reserved IO Range (4K, 8K, 12K, 16K,
20K) for this port.
[4]
// 81
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