Video Display Control Register (Vdctl); Video Display Status Register (Vdstat); Video Display Status Register (Vdstat) Field Descriptions - Texas Instruments TMS320DM648 User Manual

Video port/vcxo interpolated control (vic) port
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31
30
29
Reserved
FRMD
F2D
R-0
R/WC-0 R/WC-0 R/WC-0
15
14
13
Reserved
VBLNK
R-0
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-6. Video Display Status Register (VDSTAT) Field Descriptions
(1)
Bit
field
symval
31
Reserved
-
30
FRMD
OF(value)
DEFAULT
NONE
DISPLAYED
CLEAR
29
F2D
OF(value)
DEFAULT
NONE
DISPLAYED
CLEAR
28
F1D
OF(value)
DEFAULT
NONE
DISPLAYED
CLEAR
27-16 VDYPOS
OF(value)
DEFAULT
15-14 Reserved
-
13
VBLNK
OF(value)
DEFAULT
EMPTY
NOTEMPTY
12
VDFLD
OF(value)
DEFAULT
FIELD1ACT
FIELD2ACT
11-0
VDXPOS
OF(value)
DEFAULT
(1)
For CSL implementation, use the notation VD_VDSTAT_field_symval

4.12.2 Video Display Control Register (VDCTL)

For video display mode, field detect is enabled automatically when the VXS bit is set to 1 and the FXS bit
is cleared to 0. Ensure that the FXS bit is not set to 1 because this causes the video port to expect a filed
input on the pin.
SPRUEM1 – May 2007
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Figure 4-31. Video Display Status Register (VDSTAT)
28
27
F1D
12
11
VDFLD
R-0
(1)
Value
Description
0
Reserved. The reserved bit location is always read as 0. A value written to this field
has no effect.
Frame displayed bit. Write 1 to clear the bit, a write of 0 has no effect.
0
Complete frame has not been displayed.
1
Complete frame has been displayed.
Field 2 displayed bit. Write 1 to clear the bit, a write of 0 has no effect.
0
Field 2 has not been displayed.
1
Field 2 has been displayed.
Field 1 displayed bit. Write 1 to clear the bit, a write of 0 has no effect.
0
Field 1 has not been displayed.
1
Field 1 has been displayed.
0-FFFh
Current frame line counter (FLCOUNT) value. Index of the current line in the current
field being displayed by the module.
0
0
Reserved. The reserved bit location is always read as 0. A value written to this field
has no effect.
Vertical blanking bit.
0
Video display is not in a vertical-blanking interval.
1
Video display is in a vertical-blanking interval.
VDFLD bit indicates which field is currently being displayed. The VDFLD bit is
updated at the start of the vertical blanking interval of the next field.
0
Field 1 is active.
1
Field 2 is active.
0-FFFh
Current frame pixel counter (FPCOUNT) value. Index of the most recently output
pixel.
0
Video Display Registers
VDYPOS
R-0
VDXPOS
R-0
Video Display Port
16
0
123

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