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1.1
Video Port
The video port peripheral can operate as a video capture port, video display port, or transport channel
interface (TCI) capture port.
It provides the following functions:
Video capture mode:
– Capture rate of up to 80 MHZ.
– Two channels of 8-bit digital video input from a digital camera or an analog camera (using a video
decoder). Digital video input is in YCbCr 4:2:2 format with 8-bit resolution multiplexed in ITU-R
BT.656 format.
– One channel of Y/C 16-bit digital video input in YCbCr 4:2:2 format on separate Y and Cb/Cr inputs.
Supports SMPTE 260M, SMPTE 274M, SMPTE 296M, ITU-BT.1120, etc., as well as older
CCIR601 interfaces.
– YCbCr 4:2:2 to YCbCr 4:2:0 horizontal conversion and 1/2 scaling in 8-bit 4:2:2 modes.
– Direct interface for two channels of up to 8-bit or one channel of up to 16-bit raw video from A/D
converters.
Video display mode:
– Display rate of up to 110 MHZ.
– One channel of continuous digital video output. Digital video output is YCbCr 4:2:2 co-sited pixel
data with 8-bit resolution multiplexed in ITU-R BT.656 format.
– One channel of Y/C 16-bit digital video output in YCbCr 4:2:2 format on separate Y and Cb/Cr
outputs. (Supports SMPTE 260M, SMPTE 274M, SMPTE 296M, ITU-BT.1120, etc.)
– YCbCr 4:2:0 to YCbCr 4:2:2 horizontal conversion and 2x scaling of output in 8-bit 4:2:2 modes.
– Programmable clipping of BT.656 and Y/C mode output values.
– One channel of raw data output up to 16-bits for interface to RAMDACs. Two channel synchronized
raw data output.
– Synchronizes to external video controller or another video display port.
– Using the external clock, the frame timing generator provides programmable image timing that
includes horizontal and vertical blanking, start of active video (SAV) and end of active video (EAV)
code insertion, and horizontal and frame timing pulses.
– Generates horizontal and vertical synchronization and blanking signals and a frame synchronization
signal.
TCI capture mode: Transport channel interface (TCI) from a front-end device (such as demodulator) or
a forward error correction device in 8-bit parallel format at up to 30 Mbytes/sec.
The port generates up to three events per channel in BT656 and Y/C Mode, one event per channel in
RAW and TCI mode and one interrupt to the DSP.
A high-level block diagram of the video port is shown in
and B. You can split a 5120-byte capture/display buffer between the two channels. The entire port (both
channels) is always configured for either video capture or display only. Separate data pipelines control the
parsing and formatting of video capture or display data for each of the BT.656, Y/C, raw video, and TCI
modes.
For video capture operation, the video port may operate as two 8-bit channels of BT.656 or raw video
capture; or as a single channel of 8-bit BT.656, 8-bit raw video, 8-bit Y/C video, 16-bit raw video, or 8-bit
TCI.
For video display operation, the video port may operate as a single channel of 8-bit BT.656, 8-bit raw
video, 8-bit Y/C video, or 16-bit raw video. It may also operate in a two channel 8-bit raw mode in which
the two channels are locked to the same timing. Channel B is not used during single channel operation.
It is important to note that the VideoPort Data pin numbering is compatible with TMS320DM642 DSP
chip.In case of a 8-bit channel the suffixes for the data pins are mentioned as VDOUT[9-2]for
display/output port and VDIN[9-2]for capture/input port. In case of a 16-bit channel the suffixes for the data
pins are mentioned as VDOUT[19-2]for display/output port and VDIN[19-2]for capture/input port.
SPRUEM1 – May 2007
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Figure
1-1. The port consists of two channels: A
Video Port
Overview
17
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