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Y/C Video Capture Mode
VCLKINA / VCLKINB
VDIN[9−2] / VDIN[9−12]
63
56
Y 31
Y 23
Y 15
Y 7
Y FIFO
63
56
Cb 15
Cb 7
Cb FIFO
63
56
Cr 15
Cr 7
Cr FIFO
3.3
Y/C Video Capture Mode
The Y/C capture mode is similar to the BT.656 capture mode but captures 8-bit 4:2:2 data on separate
luma and chroma data streams. One data stream contains Y samples and the other stream contains
multiplexed Cb and Cr samples co-sited with every other Y sample. The Y samples are written into a Y
FIFO and the chroma samples are de-multiplexed and written into separate Cb and Cr FIFOs for transfer
into Y, Cb, and Cr buffers in DSP memory.
The Y/C capture mode supports HDTV standards such as SMPTE260, SMPTE296, and BT.1120 with
embedded EAV and SAV codes. It also supports SDTV YCbCr modes that use separate control signals
(sometimes called CCIR601 mode)
As with the BT.656 capture mode, data bytes where the 8 most-significant bits are all set to 1 (FFh) or are
all cleared to 0 (00h) are reserved for data identification purposes and consequentially only 254 of the
possible 256 8-bit words may be used to express signal value.
3.3.1 Y/C Capture Channels
Because Y/C mode requires the entire VDATA bus, only single channel operation is supported. If the
DCHDIS bit in VPCTL is set, then Y/C mode cannot be selected. Y/C capture takes place on channel A
only. Both embedded timing references and external control inputs are supported.
3.3.2 Y/C Timing Reference Codes
Many high-resolution Y/C interface standards provide for embedded timing reference codes. These codes
are identical to those used in the BT.656 standard except that they appear on both the luma (Y) and
chroma (CbCr) data streams in parallel.
3.3.3 Y/C Image Window and Capture
The SDTV Y/C format (CCIR601) is an interlaced format consisting of two fields just like BT.656. HDTV
Y/C formats may be interlaced or progressive scan. For interlaced capture, the capture windows are
programmed identically to BT.656 mode. For progressive scan formats, only field1 is used.
In Y/C mode, HCOUNT increments on every luma sample period (every VCLKINA rising edge) for which
capture is enabled. Once YCOUNT = YSTART, line capture begins when HCOUNT = XSTART. It
continues until HCOUNT = XSTOP. A field's capture is complete when HCOUNT = VCXSTOP and
VCOUNT = VCYSTOP.
50
Video Capture Port
Figure 3-2. 8-Bit BT.656 FIFO Packing
Cb 0
Y 0
Cr 0
Y 1
55
48 47
40 39
Y 30
Y 29
Y 22
Y 21
Y 14
Y 13
Y 6
Y 5
55
48 47
40 39
Cb 14
Cb 13
Cb 6
Cb 5
55
48 47
40
39
Cr 14
Cr 13
Cr 6
Cr 5
Little-Endian Packing
Cb 1
Y 2
Cr 1
Y 3
Cb 2
32
31
24
23
Y 28
Y 27
Y 26
Y 20
Y 19
Y 18
Y 12
Y 11
Y 10
Y 4
Y 3
Y 2
32
31
24
23
Cb 12
Cb 11
Cb 10
Cb 4
Cb 3
Cb 2
32
31
24
23
Cr 12
Cr 11
Cr 10
Cr 4
Cr 3
Cr 2
www.ti.com
Y 4
Cr 2
Y 5
16
15
8 7
0
Y 25
Y 24
Y 17
Y 16
Y 9
Y 8
Y 1
Y 0
16
15
8 7
0
Cb 9
Cb 8
Cb 1
Cb 0
16
15
8 7
0
Cr 9
Cr 8
Cr 1
Cr 0
SPRUEM1 – May 2007
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