Sun Microsystems Ultra 1 Creator Series Service Manual page 41

CODE EXAMPLE 3-1
0> Checking BMX's 0>Probing Memory
0> Found Memory Group (Variable based upon memory configuration)
0> Found (Variable based upon memory configuration) of usable Main Memory
0>SIMM Group
0> 0 00000000.00000000 08000000 00
0> 1 00000000.20000000 08000000 00
0>Quick Memory Test
0>Clear and Test Stack Memory
SelfTest Initializing
0>Basic CPU Test
0> Instruction Cache Tag RAM Test
0> Instruction Cache Instruction RAM Test
0> Instruction Cache Next Field RAM Test
0> Instruction Cache Pre-decode RAM Test
0> Data Cache RAM Test
0> Data Cache Tags Test
0>MMU Enable Test
0> DMMU Registers Access Test
0> DMMU TLB DATA RAM Access Test
0> DMMU TLB TAGS Access Test
0> IMMU Registers Access Test
0> IMMU TLB DATA RAM Access Test
0> IMMU TLB TAGS Access Test
0> DMMU Init
0> IMMU Init
0> Mapping Selftest Enabling MMUs
0>FPU Register Test
0> FPU Registers and Data Path Test
0> FSR Read/Write Test
0>EPROMs Test
0> PROM Datapath Test
0>Serial Ports Test
0> Slavio Serial Ports Test
0>NVRAM TOD Test
0> M48T59 (TOD) Init
0> M48T59 (TOD) Functional Part 1 Test
SelfTest Initializing
0>Memory Test
0> Memory Clear Test
0> Test being relocated into Cache
0> Memory RAM (blk) Test
0> Test being relocated into Cache
Diag-level NVRAM Variable Set to Max (Continued)
Base Addr Size Group Status
Chapter 3 Power-On Self-Test 3-7