Clock+ Board - Sun Microsystems Enterprise 6500 Reference Manual

Hold the board only by the edges near the middle of the board, where the board
stiffener is located. Do not hold the board only at the ends.
When removing the board from an antistatic bag, keep the board vertical until
you lay it on the Sun ESD mat.
Do not place the board on a hard surface. Use a cushioned antistatic mat. The
board connectors and components have very thin pins that bend easily.
Do not use an oscilloscope probe on the components. The soldered pins are easily
damaged or shorted by the probe point.
Transport the board in an antistatic bag.
Be careful not to drag boards across surfaces as board components are easily
damaged.
6.2

Clock+ Board

There is one clock+ board to a system. The clock+ board provides:
Programmable system and processor clock
Serial, keyboard, and mouse ports for the console
Centralized Time-of-day (TOD) chip that includes NVRAM
Centralized reset logic
Status and control of power supplies
The clock+ board consists of the following subsystems:
Console Bus
Clocks
Reset logic
JTAG
Centerplane connector signals
FIGURE 6-1
6-2 Sun Enterprise 6500/5500/4500 Systems Reference Manual • April 1998
depicts a block diagram of the subsystems and centerplane connector.