Texas Instruments SimpleLink CC3220MOD Series Manual page 19

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GENERAL PIN ATTRIBUTES
Select
Pkg. Pin
Use Wakeu
Pin Alias
Source
JTAG_T
12 I/O
DI
FLASH_
13 SPI_ N/A
MISO
FLASH_
14 SPI_ N/A
nCS_IN
FLASH_
15 SPI_CL N/A
K
16 GND GND
FLASH_
17 SPI_ N/A
MOSI
JTAG_T
18 I/O
DO
19 GPIO28 I/O
WLAN
20 NC
analog
Copyright © 2021 Texas Instruments Incorporated
Table 7-3. Pin Attributes and Pin Multiplexing (continued)
FUNCTION
Confi
Dig. Pin
as g. Muxed
Mux
Addl. With
Config.
p Analo JTAG
Reg.
g Mux
GPIO_PA
Muxed D_
with CONFIG_2
No No
JTAG 3
TDI (0x4402
E0FC)
N/A N/A N/A N/A
N/A N/A N/A N/A
N/A N/A N/A N/A
N/A N/A N/A N/A
N/A N/A N/A N/A
GPIO_PA
Muxed D_
with CONFIG_
Yes No
JTAG 24
TDO (0x4402
E100)
GPIO_PA
D_
CONFIG_
No No No
40
(0x4402
E140)
N/A N/A N/A N/A
Product Folder Links:
SWRS206E – MARCH 2017 – REVISED MAY 2021
Dig.
Pin
Mux
Signal
Confi Signal Name
Description
g.
Mode
Value
JTAG TDI.
1 TDI Reset default
pinout.
0 GPIO23 GPIO
UART1 TX
2 UART1_TX
data
9 I2C_SCL I2C clock
Data from SPI
FLASH_SPI_
N/A serial Flash
MISO
(fixed default)
Chip select to
FLASH_SPI_ SPI serial
N/A
nCS_IN Flash (fixed
default)
Clock to SPI
FLASH_SPI_
N/A serial Flash
CLK
(fixed default)
N/A GND GND
Data to SPI
FLASH_SPI_
N/A serial Flash
MOSI
(fixed default)
JTAG TDO.
1 TDO Reset default
pinout.
0 GPIO24 GPIO
Pulse-width
5 PWM0 modulated
O/P
UART1 RX
2 UART1_RX
data
2
9 I2C_SDA I C data
Timer capture
4 GT_CCP06
port
I2S audio port
6 McAFSX
frame sync
0 GPIO28 GPIO
N/A NC Reserved
CC3220MOD CC3220MODA
CC3220MOD, CC3220MODA
PAD STATES
Signa
l LPD nRESET =
(2)
Hib
(1)
Direct S 0
ion
Hi-Z,
I
Pull,
Drive
I/O
Hi-Z,
Pull, Hi-Z
O 1
Drive
I/O Hi-Z,
(open Pull,
drain) Drive
N/A Hi-Z Hi-Z Hi-Z
Hi-Z,
N/A 1 Pull, Hi-Z
Drive
Hi-Z, Hi-Z,
N/A Pull, Pull, Hi-Z
(3)
Drive Drive
N/A N/A N/A N/A
Hi-Z, Hi-Z,
N/A Pull, Pull, Hi-Z
(3)
Drive Drive
O
I/O
Drive
n
O
high
in
Hi-Z,
SWD;
I Pull, Hi-Z
drive
Drive
n low
I/O
in 4-
(open
wire
drain)
JTAG
I
O
Hi-Z, Hi-Z,
I/O Pull, Pull, Hi-Z
Drive Drive
N/A N/A N/A N/A
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