Pin Attributes And Pin Multiplexing - Texas Instruments SimpleLink CC3220MOD Series Manual

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DEFAULT
PIN
FUNCTION
20 NC
29 NC
31 NC
33 NC
39 NC
41 NC
45 NC

7.4 Pin Attributes and Pin Multiplexing

The module makes extensive use of pin multiplexing to accommodate the large number of peripheral functions in
the smallest possible package. To achieve this configuration, pin multiplexing is controlled using a combination of
hardware configuration (at module reset) and register control.
The board and software designers are responsible for the proper pin multiplexing configuration. Hardware does
not ensure that the proper pin multiplexing options are selected for the peripherals or interface mode used.
7-3 describes the general pin attributes and presents an overview of pin multiplexing. All pin multiplexing options
are configurable using the pin MUX registers. The following special considerations apply:
• All I/Os support drive strengths of 2, 4, and 6 mA. Drive strength is individually configurable for each pin.
• All I/Os support 10-μA pullup and pulldown resistors.
• By default, all I/Os float in the Hibernate state. However, the default state can be changed by SW.
• All digital I/Os are non fail-safe.
If an external device drives a positive voltage to the signal pads and the CC3220MODx or
CC3220MODAx modules are not powered, DC is drawn from the other device. If the drive strength
of the external device is adequate, an unintentional wakeup and boot of the CC3220MODx or
CC3220MODAx modules can occur. To prevent current draw, TI recommends any one of the following
conditions:
• All devices interfaced to CC3220MODx and CC3220MODAx modules must be powered from the
same power rail as the chip.
• Use level shifters between the device and any external devices fed from other independent rails.
• The nRESET pin of the CC3220MODx and CC3220MODAx modules must be held low until the
VBAT supply to the module is driven and stable.
• All GPIO pins default to high impedance unless programmed by the MCU. The bootloader sets the
TDI, TDO, TCK, TMS, and Flash_SPI pins to mode 1. All the other pins are left in the Hi-Z state.
GENERAL PIN ATTRIBUTES
Select
Pkg. Pin
Use Wakeu
Pin Alias
Source
1 GND GND
2 GND GND
Copyright © 2021 Texas Instruments Incorporated
Table 7-2. CC3220MODAx Connections for Unused Pins
STATE AT RESET AND
HIBERNATE
WLAN analog
WLAN analog
WLAN analog
WLAN analog
WLAN analog
WLAN analog
WLAN analog
Table 7-3. Pin Attributes and Pin Multiplexing
FUNCTION
Confi
Dig. Pin
as g. Muxed
Mux
Addl. With
Config.
p Analo JTAG
Reg.
g Mux
N/A N/A N/A N/A
N/A N/A N/A N/A
Product Folder Links:
SWRS206E – MARCH 2017 – REVISED MAY 2021
I/O TYPE
– Reserved. Do not connect.
– Reserved. Do not connect.
– Reserved. Do not connect.
– Reserved. Do not connect.
– Reserved. Do not connect.
– Reserved. Do not connect.
– Reserved. Do not connect.
Note
Dig.
Pin
Mux
Signal
Confi Signal Name
Description
g.
Mode
Value
N/A GND GND
N/A GND GND
CC3220MOD CC3220MODA
CC3220MOD, CC3220MODA
DESCRIPTION
Table
PAD STATES
Signa
l LPD nRESET =
(2)
Hib
(1)
Direct S 0
ion
N/A N/A N/A N/A
N/A N/A N/A N/A
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