Texas Instruments CDCM9102EVM User Manual

CDCM9102EVM is the evaluation module (EVM) for the CDCM9102, a low-jitter clock generator that
provides reference clocks for communications standards such as PCI Express. This clock generator is
easy to configure and use. It provides two, 100-MHz, differential clock ports. The supported output types
for these ports include LVPECL, LVDS, or a pair of LVCMOS buffers. An ac-coupled network supports
HCSL signaling. The user configures the desired output buffer type by strapping device pins. Additionally,
the EVM has a single-ended, 25-MHz clock output port. Uses for this port include general-purpose
clocking, clocking Ethernet PHYs, or providing a reference clock for additional clock generators. All
generated clocks derive from a single, 25-MHz crystal that is external to the device. This fully assembled
and factory-tested evaluation board allows complete validation of all device functions.
......................................................................................................................
1 Features
2 General Description
3 Signal Path and Control Circuitry
4 Getting Started
4.1 Power-Supply Connection
5 Input Clock Selection
5.1 Configuring a Crystal Input
5.2 Configuring a Single-Ended Input
6 Operating Mode Selection
6.1 Output Buffer Type Selection
6.2 Using ENABLE and RESET Pins
7 Output Buffer Termination
7.1 Output Buffer Examples
7.2 Availability of Optional Output
....................................................................................................................
8 Schematic
1 CDCM9102EVM Evaluation Module
2 CDCM9102EVM Configuration With Parallel-Load Resonant Crystal Clock Source
3 Single-Ended Connection Configuration
4 EVM Output Termination Options
5 CDCM9102EVM Schematic
1 Output Buffer Options
2 Power-Down Configuration
3 Reset Configuration
SCAU048 - March 2012
Submit Documentation Feedback
CDCM9102EVM Clock Evaluation Module
.........................................................................................................
.........................................................................................
..............................................................................................................
........................................................................................
.......................................................................................................
.......................................................................................
................................................................................
.................................................................................................
.....................................................................................
................................................................................
.................................................................................................
...........................................................................................
....................................................................................
List of Figures
.....................................................................................
.................................................................................
.........................................................................................
...............................................................................................
......................................................................................................
................................................................................................
.........................................................................................................
Copyright © 2012, Texas Instruments Incorporated
Contents
List of Tables
CDCM9102EVM Clock Evaluation Module
User's Guide
SCAU048 - March 2012
2
2
3
3
3
3
3
4
4
4
4
5
5
5
6
2
..............................
3
4
5
6
4
4
5
1