Ide, Connectors J15 And J16 - Xilinx ML310 User Manual

Virtex-ll pro embedded development platform
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IDE, connectors J15 and J16

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Supports a 2-channel UltraDMA-133 IDE Master controller independently connected to a
Primary 40 Pin IDC connector (J16) and a Secondary 40 Pin IDC connector (J15). Please
review the ALi M1535D+ Data sheets for more detailed information.
Table 2-16
shows the ALi Primary and Secondary IDE connections to the two 40 pin IDE
Connectors, J15 and J16.
Table 2-16: ALi South Bridge IDE connectors, J15 and J16
J15/J16
Schem Signal
Pin No.
1
IDE_RESET_N
3
IDE_D7
5
IDE_D6
7
IDE_D5
9
IDE_D4
11
IDE_D3
13
IDE_D2
15
IDE_D1
17
IDE_D0
19
GND
21
IDE_DMARQ
23
IDE_DIOW_N
25
IDE_DIOR
27
IDE_IORDY
29
IDE_DMACK_N
31
IDE_INTRQ
33
IDE_A1
35
IDE_A0
37
IDE_CS1_N
39
IDE_DASP_N
Chapter 2: ML310 Embedded Development Platform
J15/J16
Schem Signal
Pin No.
2
GND
4
IDE_D8
6
IDE_D9
8
IDE_D10
10
IDE_D11
12
IDE_D12
14
IDE_D13
16
IDE_D14
18
IDE_D15
20
(KEY)
22
GND
24
GND
26
GND
28
CSEL
30
GND
32
N.C.
34
IDE_PDIAG_N
36
IDE_A2
38
IDE_CS3_N
40
GND
www.xilinx.com
1-800-255-7778
ML310 User Guide
UG068 (v1.01) August 25, 2004

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