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Board Hardware
ML310 User Guide
UG068 (v1.01) August 25, 2004
All manuals and user guides at all-guides.com
Table 2-1: Connections from FPGA to DIMM Interface, P7
XC2VP30 Pin
UCF Signal Name
ddr_ad[2]
AG20
ddr_ad[3]
AF23
ddr_ad[4]
AH22
ddr_ad[5]
AF22
ddr_ad[6]
AF21
ddr_ad[7]
AH21
ddr_ad[8]
AG21
ddr_ad[9]
AJ21
ddr_ad[10]
AK21
ddr_ad[11]
AH20
ddr_ad[12]
AF20
ddr_ba[0]
AG18
ddr_ba[1]
AF19
ddr_casb
AF17
ddr_cke
AG24
ddr_csb
AE17
ddr_rasb
AE16
ddr_web
AD16
ddr_clk
V30
ddr_clkb
U30
ddr_clk_fb
AF16
ddr_clk_fb_out
AG25
ddr_dm[0]
AH29
ddr_dm[1]
AE29
ddr_dm[2]
AA24
ddr_dm[3]
AB30
ddr_dm[4]
P30
ddr_dm[5]
M30
ddr_dm[6]
K24
ddr_dm[7]
E30
ddr_dqs[0]
AG30
ddr_dqs[1]
AF30
ddr_dqs[2]
AA28
ddr_dqs[3]
Y29
ddr_dqs[4]
P28
Schem Signal Name
(U37)
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_BA0
DDR_BA1
DDR_CAS_N
DDR_CKE0
DDR_S0_N
DDR_RAS_N
DDR_WE_N
DDR_CK0
DDR_CK0_N
DDR_CLK_FB
DDR_CLK_FB
DDR_DQM07
DDR_DQM06
DDR_DQM05
DDR_DQM04
DDR_DQM03
DDR_DQM02
DDR_DQM01
DDR_DQM00
DDR_DQS07
DDR_DQS06
DDR_DQS05
DDR_DQS04
DDR_DQS03
www.xilinx.com
1-800-255-7778
R
DIMM
(P7)
41
130
37
32
125
29
122
27
141
118
115
59
62
65
21
157
154
63
137
138
N/A
N/A
177
169
159
149
129
119
107
97
86
78
67
56
36
23
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