Xilinx ML310 User Manual page 56

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56
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The front panel interface provides the following status information available at the J23
header.
♦
FPGA Configuration DONE
- Output intended for driving an LED
♦
IDE Disk access
- Output intended for driving an LED
♦
ATX Power
- Output intended for driving an LED
♦
2 FPGA User Defined Signals
- Outputs intended for driving LEDs
♦
ATX Speaker
Output, see Ali M1535D+ data sheet for more details
-
♦
Keyboard Inhibit (active low input)
Table 2-25 shows the signals available at the Front Panel Interface header, J23.
Table 2-25: Front Panel Interface connector, J23
J23
Schem Signal
Pin
1 SYACE_CFGA0
2 FPGA_USER_LED1
3 SYACE_CFGA1
4 FPGA_USER_LED2
5 SYACE_CFGA2
6 NC
7 LED_DONE_R
8 GND
9 ATX_PWRLED
10 ATX_SPKR
11 NC
12 NC
13 GND
14 GND
Chapter 2: ML310 Embedded Development Platform
Used to select System ACE configuration,
CFGADDR0
User Defined function, Connects to XC2VP30, U37-
AH10, (2.5V Bank)
Used to select System ACE configuration,
CFGADDR1
User Defined function, Connects to XC2VP30, U37-
AC14, (2.5V Bank)
Used to select System ACE configuration,
CFGADDR2
No Connect
Remote FPGA DONE indicator, Tie this pin to Anode
of user's LED and Cathode to GND
Ground
ATX 3.3V power indicator, Tie this pin to Anode of
user's LED and Cathode to GND
Used to drive user defined ATX Speaker input
No Connect
No Connect
Ground
Ground
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Description
ML310 User Guide
UG068 (v1.01) August 25, 2004