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Board Hardware
Virtex-II Pro
XC2VP30
ML310 User Guide
UG068 (v1.01) August 25, 2004
All manuals and user guides at all-guides.com
Table 2-14
shows a block diagram of the FPGA in relation to the SMBus accelerator and the
IIC bus.
Note:
Either the XC2VP30 or the ALi M1535D+ can master the IIC bus but not simultaneously
U37
IIC Bus
FPGA
PCI Bus
Figure 2-14: SMBus and IIC Block Diagram
U27
SMBUS
Accelerator
U15
LTC1694
ALi
Southbridge
U20
Voltage
M1535 D+
Temp
Monitor
ADDR:
0x5C
LM87
U22
RTClock
ADDR:
0xA2
RTC8566
U21
EEPROM
ADDR:
0xA0
24LC64
P7
SPD
EEPROM
www.xilinx.com
1-800-255-7778
Temperature
VCC12V_P
VCC5V
VCC2V5
VVCC3_PCI
VCC1V5
Note: Located on
DDR DIMM P7
R
51
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