Table 14. Lcd-Daughterboard-Related Configuration Elements; Figure 10. Lcd Glass Module Daughterboard In I/O-Bridge Position - ST STM32L476G-EVAL User Manual

Hardware layout and configuration

Figure 10. LCD glass module daughterboard in I/O-bridge position

Table 14. LCD-daughterboard-related configuration elements

LCD
Element
segment
R82
SEG0
SB32
R81
SEG1
SB31
R78
SEG2
SB22
R68
SEG3 SB21
SB20
R66
SEG4 SB18
SB19
R62
SEG5 SB14
SB15
R56
SEG6 SB12
SB13
R50
SEG10
SB9
34/100
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Setting to enable
LCD glass
module
In PA1 routed to LCDSEG0
Open PA1 not routed to motor control
In PA2 routed to LCDSEG1
Open PA2 not routed to motor control
In PA3 routed to LCDSEG2
Open PA3 not routed to motor control
In PA6 routed to LCDSEG3
Open PA6 not routed to Quad-SPI Flash memory device
Open PA6 not routed to motor control
In PA7 routed to LCDSEG4
Open PA7 not routed to Quad-SPI Flash memory device
Open PA7 not routed to motor control
In PB0 routed to LCDSEG5
Open PB0 not routed to Quad-SPI Flash memory device
Open PB0 not routed to motor control
In PB1 routed to LCDSEG6
Open PB1 not routed to Quad-SPI Flash memory device
Open PB1 not routed to motor control
In PB10 routed to LCDSEG10
Open PB10 not routed to Quad-SPI Flash memory device
DocID027351 Rev 3
UM1855
Description