Figure 51. Audio Codec Device Schematic Diagram - ST STM32L476G-EVAL User Manual

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Figure 51. Audio codec device schematic diagram

+3V3
+3V3
+1V8
+1V8
VDD
+1V8
R200
VDD
C108
R201 0
SAI1_SCKB
R208 0
SAI1_FSB
R198 0
SAI1_SDB
R205 0
SAI1_SDA
R199 0
CODEC_INT
PC2
DFSDM_CKOUT
JP14
R238 10K
U35
1 2
VDD LR
3
CLK
5 4
GND DOUT
MP34DT01TR
U36
1 2
VDD LR
3 PC0
CLK DMIC_DATIN
5 4
GND DOUT
MP34DT01TR
JP16
MICBIAS1
VDD
Operating range: 1.62<VDD<3.6V
Default I2C Address:0011010
U29
E9 D6
LDO1VDD AGND
D9 E7
AVDD1 AGND
B2 E8
SPKVDD1 AGND
C2 A1
SPKVDD2 SPKGND1
D8 C1
AVDD2 SPKGND2
G9 H9
CPVDD CPGND
F1 E2
DCVDD DGND
D2 F7
DBVDD HP2GND
D1
LDO2VDD
F3 PG13
SDA I2C_SDA
10K D4 H1 PG14
LDO1ENA SCLK I2C_SCL
D5 G2 R197 [N/A]
LDO2ENA CS/ADDR VDD
1uF E6 A4
VREFC CIFMODE
R222
D3 PF7
MCLK1 SAI1_MCKB
C6 E1
0
DMICCLK GPIO2/MCLK2
PF8 G1 A3
BCLK1 SPKMODE
PF9 E3 A5
LRCLK1 REFGND
PF6 E4
DACDAT1
PD6 F2 A7
ADCDAT1 MICBIAS1
PG6 G3 B6
ADCLRCLK1/GPIO1 MICBIAS2
C9
VMIDC
C125 C127 C128
H2 F9
GPIO3/BCLK2 HPOUT2N
4.7uF 4.7uF 4.7uF
F4 F8
GPIO4/LRCLK2 HPOUT2P
H3
GPIO5/DACDAT2
E5 G5
GPIO7/ADCDAT2 HPOUT1FB
G4 G6
GPIO6/ADCLRCLK2 HPOUT1R
H6
HPOUT1L
F6
GPIO11/BCLK3
H5
GPIO10/LRCLK3
H4
GPIO8/DACDAT3
F5 C5
GPIO9/ADCDAT3 LINEOUT1N
B5
LINEOUT1P
C8 C4 R195 R196
IN1LP LINEOUT2N
20 20
D7 B4
IN1LN LINEOUT2P
A6
LINEOUTFB
B8
IN2LP/VRXN
B9
IN2LN/DMICDAT1
B1
SPKOUTLN
C7 A2
IN1RP SPKOUTLP
B7
IN1RN
C3
SPKOUTRN
A8 B3
IN2RP/VRXP SPKOUTRP
A9
IN2RN/DMICDAT2
G8
CPCA
H8
CPCB
C102 2.2uF
H7
CPVOUTN
G7 C104 2.2uF
CPVOUTP
C103 2.2uF
WM8994ECS/R
R191
GND
0
GND
3 CN20
6
4
2
GND
PJ3028B-3
R192
GND
0
R220
R224
GND
1K
0
CN21
C130 3
R225
6
180
4.7uF
4
2
C129
R227
PJ3028B-3
180
4.7uF R221
R226 0
1K
GND
GND
Title: Audio
Project: STM32L476G-EVAL
Size: A3 Reference: MB1144 Revision: B-02
Date: 6/24/2015 Sheet: 20 of 25